ARM: dts: imx6: use imx51-ssi
authorMarkus Pargmann <mpa@pengutronix.de>
Fri, 17 Jan 2014 09:07:42 +0000 (10:07 +0100)
committerShawn Guo <shawn.guo@linaro.org>
Mon, 10 Feb 2014 08:27:39 +0000 (16:27 +0800)
imx51-ssi and imx21-ssi are different IPs. imx51-ssi supports online
reconfiguration and needs this for correct interaction with SDMA. This
patch adds imx51-ssi before each imx21-ssi for all imx6 SoCs.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/boot/dts/imx6qdl.dtsi
arch/arm/boot/dts/imx6sl.dtsi

index 2dd30ec..947e463 100644 (file)
                                };
 
                                ssi1: ssi@02028000 {
-                                       compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";
+                                       compatible = "fsl,imx6q-ssi",
+                                                       "fsl,imx51-ssi",
+                                                       "fsl,imx21-ssi";
                                        reg = <0x02028000 0x4000>;
                                        interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks 178>;
                                };
 
                                ssi2: ssi@0202c000 {
-                                       compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";
+                                       compatible = "fsl,imx6q-ssi",
+                                                       "fsl,imx51-ssi",
+                                                       "fsl,imx21-ssi";
                                        reg = <0x0202c000 0x4000>;
                                        interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks 179>;
                                };
 
                                ssi3: ssi@02030000 {
-                                       compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";
+                                       compatible = "fsl,imx6q-ssi",
+                                                       "fsl,imx51-ssi",
+                                                       "fsl,imx21-ssi";
                                        reg = <0x02030000 0x4000>;
                                        interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks 180>;
index a655b5b..3cb4941 100644 (file)
                                };
 
                                ssi1: ssi@02028000 {
-                                       compatible = "fsl,imx6sl-ssi","fsl,imx21-ssi";
+                                       compatible = "fsl,imx6sl-ssi",
+                                                       "fsl,imx51-ssi",
+                                                       "fsl,imx21-ssi";
                                        reg = <0x02028000 0x4000>;
                                        interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SL_CLK_SSI1>;
                                };
 
                                ssi2: ssi@0202c000 {
-                                       compatible = "fsl,imx6sl-ssi","fsl,imx21-ssi";
+                                       compatible = "fsl,imx6sl-ssi",
+                                                       "fsl,imx51-ssi",
+                                                       "fsl,imx21-ssi";
                                        reg = <0x0202c000 0x4000>;
                                        interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SL_CLK_SSI2>;
                                };
 
                                ssi3: ssi@02030000 {
-                                       compatible = "fsl,imx6sl-ssi","fsl,imx21-ssi";
+                                       compatible = "fsl,imx6sl-ssi",
+                                                       "fsl,imx51-ssi",
+                                                       "fsl,imx21-ssi";
                                        reg = <0x02030000 0x4000>;
                                        interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SL_CLK_SSI3>;