board: starfive: support Milk-V Mars board

The differences between the Milk-V Mars board and the VisionFive 2 board
are small enough that we can support both using the same U-Boot build.

* The model and compatible property are taken from proposed Linux patches.
* The EEPROM is atmel,24c02 according to the vendor U-Boot.
* The second Ethernet port is not available.

usb@10100000 does not exist in U-Boot yet. So we don't have to reflect
differences in usage here.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>

diff --git a/board/starfive/visionfive2/spl.c b/board/starfive/visionfive2/spl.c
index 1b49945..e8f97d9 100644 (file)
--- a/board/starfive/visionfive2/spl.c
+++ b/board/starfive/visionfive2/spl.c
@@ -27,6 +27,26 @@ struct starfive_vf2_pro {
        const char *value;
 };
 
+static const struct starfive_vf2_pro milk_v_mars[] = {
+       {"/soc/ethernet@16030000", "starfive,tx-use-rgmii-clk", NULL},
+       {"/soc/ethernet@16040000", "starfive,tx-use-rgmii-clk", NULL},
+
+       {"/soc/ethernet@16030000/mdio/ethernet-phy@0",
+               "motorcomm,tx-clk-adj-enabled", NULL},
+       {"/soc/ethernet@16030000/mdio/ethernet-phy@0",
+               "motorcomm,tx-clk-100-inverted", NULL},
+       {"/soc/ethernet@16030000/mdio/ethernet-phy@0",
+               "motorcomm,tx-clk-1000-inverted", NULL},
+       {"/soc/ethernet@16030000/mdio/ethernet-phy@0",
+               "motorcomm,rx-clk-drv-microamp", "3970"},
+       {"/soc/ethernet@16030000/mdio/ethernet-phy@0",
+               "motorcomm,rx-data-drv-microamp", "2910"},
+       {"/soc/ethernet@16030000/mdio/ethernet-phy@0",
+               "rx-internal-delay-ps", "1900"},
+       {"/soc/ethernet@16030000/mdio/ethernet-phy@0",
+               "tx-internal-delay-ps", "1500"},
+};
+
 static const struct starfive_vf2_pro starfive_vera[] = {
        {"/soc/ethernet@16030000/mdio/ethernet-phy@0", "rx-internal-delay-ps",
                "1900"},
@@ -67,6 +87,49 @@ static const struct starfive_vf2_pro starfive_verb[] = {
                "tx-internal-delay-ps", "0"},
 };
 
+void spl_fdt_fixup_mars(void *fdt)
+{
+       static const char compat[] = "milkv,mars\0starfive,jh7110";
+       u32 phandle;
+       u8 i;
+       int offset;
+       int ret;
+
+       fdt_setprop(fdt, fdt_path_offset(fdt, "/"), "compatible", compat, sizeof(compat));
+       fdt_setprop_string(fdt, fdt_path_offset(fdt, "/"), "model",
+                          "Milk-V Mars");
+
+       /* gmac0 */
+       offset = fdt_path_offset(fdt, "/soc/clock-controller@17000000");
+       phandle = fdt_get_phandle(fdt, offset);
+       offset = fdt_path_offset(fdt, "/soc/ethernet@16030000");
+
+       fdt_setprop_u32(fdt, offset, "assigned-clocks", phandle);
+       fdt_appendprop_u32(fdt, offset, "assigned-clocks", JH7110_AONCLK_GMAC0_TX);
+       fdt_setprop_u32(fdt, offset,  "assigned-clock-parents", phandle);
+       fdt_appendprop_u32(fdt, offset,  "assigned-clock-parents",
+                          JH7110_AONCLK_GMAC0_RMII_RTX);
+
+       /* gmac1 */
+       fdt_setprop_string(fdt, fdt_path_offset(fdt, "/soc/ethernet@16040000"),
+                          "status", "disabled");
+
+       for (i = 0; i < ARRAY_SIZE(milk_v_mars); i++) {
+               offset = fdt_path_offset(fdt, milk_v_mars[i].path);
+
+               if (milk_v_mars[i].value)
+                       ret = fdt_setprop_u32(fdt, offset, milk_v_mars[i].name,
+                                             dectoul(milk_v_mars[i].value, NULL));
+               else
+                       ret = fdt_setprop_empty(fdt, offset, milk_v_mars[i].name);
+
+               if (ret) {
+                       pr_err("%s set prop %s fail.\n", __func__, milk_v_mars[i].name);
+                               break;
+               }
+       }
+}
+
 void spl_fdt_fixup_version_a(void *fdt)
 {
        static const char compat[] = "starfive,visionfive-2-v1.2a\0starfive,jh7110";
@@ -167,22 +230,34 @@ void spl_fdt_fixup_version_b(void *fdt)
 void spl_perform_fixups(struct spl_image_info *spl_image)
 {
        u8 version;
+       const char *product_id;
 
-       version = get_pcb_revision_from_eeprom();
-       switch (version) {
-       case 'a':
-       case 'A':
-               spl_fdt_fixup_version_a(spl_image->fdt_addr);
-               break;
-
-       case 'b':
-       case 'B':
-       default:
-               spl_fdt_fixup_version_b(spl_image->fdt_addr);
+       product_id = get_product_id_from_eeprom();
+       if (!product_id) {
+               pr_err("Can't read EEPROM\n");
+               return;
+       }
+       if (!strncmp(product_id, "MARS", 4)) {
+               spl_fdt_fixup_mars(spl_image->fdt_addr);
+       } else if (!strncmp(product_id, "VF7110", 6)) {
+               version = get_pcb_revision_from_eeprom();
+               switch (version) {
+               case 'a':
+               case 'A':
+                       spl_fdt_fixup_version_a(spl_image->fdt_addr);
+                       break;
+
+               case 'b':
+               case 'B':
+               default:
+                       spl_fdt_fixup_version_b(spl_image->fdt_addr);
                break;
+               };
+       } else {
+               pr_err("Unknown product %s\n", product_id);
        };
 
-       /* Update the memory size which read form eeprom or DT */
+       /* Update the memory size which read from eeprom or DT */
        fdt_fixup_memory(spl_image->fdt_addr, 0x40000000, gd->ram_size);
 }