[MIPS] Fix the build error of Wind River PPMC board, rewrite irq code to C

 o Fix the build error Wind River PPMC board caused by the change of
   plat_setup hook interface.
 o Rewrite first level interrupt dispatch code to C.

Signed-off-by: Rongkai.Zhan <rongkai.zhan@windriver.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 35e038a..3fa67af 100644 (file)
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -358,7 +358,7 @@ config MIPS_SEAD
          board.
 
 config WR_PPMC
-       bool "Support for Wind River PPMC board"
+       bool "Wind River PPMC board"
        select IRQ_CPU
        select BOOT_ELF32
        select DMA_NONCOHERENT

diff --git a/arch/mips/gt64120/wrppmc/Makefile b/arch/mips/gt64120/wrppmc/Makefile
index 72606b9..7cf5220 100644 (file)
--- a/arch/mips/gt64120/wrppmc/Makefile
+++ b/arch/mips/gt64120/wrppmc/Makefile
@@ -9,6 +9,6 @@
 # Makefile for the Wind River MIPS 4KC PPMC Eval Board
 #
 
-obj-y  += int-handler.o irq.o reset.o setup.o time.o pci.o
+obj-y += irq.o reset.o setup.o time.o pci.o
 
 EXTRA_AFLAGS := $(CFLAGS)

diff --git a/arch/mips/gt64120/wrppmc/int-handler.S b/arch/mips/gt64120/wrppmc/int-handler.S
deleted file mode 100644 (file)
index edee7b3..0000000
--- a/arch/mips/gt64120/wrppmc/int-handler.S
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 1996, 1997, 2003 by Ralf Baechle
- * Copyright (C) Wind River System Inc. Rongkai.Zhan <rongkai.zhan@windriver.com>
- */
-#include <asm/asm.h>
-#include <asm/mipsregs.h>
-#include <asm/addrspace.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-#include <asm/mach-wrppmc/mach-gt64120.h>
-
-       .align  5
-       .set    noat
-NESTED(handle_IRQ, PT_SIZE, sp)
-       SAVE_ALL
-       CLI                             # Important: mark KERNEL mode !
-       .set    at
-
-       mfc0    t0, CP0_CAUSE           # get pending interrupts
-       mfc0    t1, CP0_STATUS          # get enabled interrupts
-       and     t0, t0, t1              # get allowed interrupts
-       andi    t0, t0, 0xFF00
-       beqz    t0, 1f
-       move    a1, sp                  # Prepare 'struct pt_regs *regs' pointer
-
-       andi    t1, t0, CAUSEF_IP7      # CPU Compare/Count internal timer
-       bnez    t1, handle_cputimer_irq
-       andi    t1, t0, CAUSEF_IP6      # UART 16550 port
-       bnez    t1, handle_uart_irq
-       andi    t1, t0, CAUSEF_IP3      # PCI INT_A
-       bnez    t1, handle_pci_intA_irq
-
-       /* wrong alarm or masked ... */
-1:     j       spurious_interrupt
-       nop
-END(handle_IRQ)
-
-       .align  5
-handle_cputimer_irq:
-       li      a0, WRPPMC_MIPS_TIMER_IRQ
-       jal     do_IRQ
-       j       ret_from_irq
-
-       .align  5
-handle_uart_irq:
-       li      a0, WRPPMC_UART16550_IRQ
-       jal     do_IRQ
-       j       ret_from_irq
-
-       .align  5
-handle_pci_intA_irq:
-       li      a0, WRPPMC_PCI_INTA_IRQ
-       jal     do_IRQ
-       j       ret_from_irq
-

diff --git a/arch/mips/gt64120/wrppmc/irq.c b/arch/mips/gt64120/wrppmc/irq.c
index 8605687..26cf360 100644 (file)
--- a/arch/mips/gt64120/wrppmc/irq.c
+++ b/arch/mips/gt64120/wrppmc/irq.c
@@ -30,7 +30,19 @@
 #include <asm/irq_cpu.h>
 #include <asm/gt64120.h>
 
-extern asmlinkage void handle_IRQ(void);
+asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+{
+       unsigned int pending = read_c0_status() & read_c0_cause();
+
+       if (pending & STATUSF_IP7)
+               do_IRQ(WRPPMC_MIPS_TIMER_IRQ, regs);    /* CPU Compare/Count internal timer */
+       else if (pending & STATUSF_IP6)
+               do_IRQ(WRPPMC_UART16550_IRQ, regs);     /* UART 16550 port */
+       else if (pending & STATUSF_IP3)
+               do_IRQ(WRPPMC_PCI_INTA_IRQ, regs);      /* PCI INT_A */
+       else
+               spurious_interrupt(regs);
+}
 
 /**
  * Initialize GT64120 Interrupt Controller
@@ -53,9 +65,6 @@ void __init arch_init_irq(void)
        /* enable all CPU interrupt bits. */
        set_c0_status(ST0_IM);  /* IE bit is still 0 */
 
-       /* Install MIPS Interrupt Trap Vector */
-       set_except_vector(0, handle_IRQ);
-
        /* IRQ 0 - 7 are for MIPS common irq_cpu controller */
        mips_cpu_irq_init(0);
 

diff --git a/arch/mips/gt64120/wrppmc/setup.c b/arch/mips/gt64120/wrppmc/setup.c
index 20c591e..2db6375 100644 (file)
--- a/arch/mips/gt64120/wrppmc/setup.c
+++ b/arch/mips/gt64120/wrppmc/setup.c
@@ -125,7 +125,7 @@ static void wrppmc_setup_serial(void)
 }
 #endif
 
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        extern void wrppmc_time_init(void);
        extern void wrppmc_timer_setup(struct irqaction *);