Merge branch 'sh/stable-updates'

diff --combined arch/sh/mm/Kconfig
index b3f6c1a,986a71b..a5dedf5
--- 1/arch/sh/mm/Kconfig
--- 2/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@@ -82,8 -82,7 +82,7 @@@ config 32BI
  
  config PMB_ENABLE
        bool "Support 32-bit physical addressing through PMB"
-       depends on MMU && EXPERIMENTAL && CPU_SH4A
-       default y
+       depends on MMU && EXPERIMENTAL && CPU_SH4A && !CPU_SH4AL_DSP
        help
          If you say Y here, physical addressing will be extended to
          32-bits through the SH-4A PMB. If this is not set, legacy
@@@ -96,7 -95,7 +95,7 @@@ choic
  
  config PMB
        bool "PMB"
-       depends on MMU && EXPERIMENTAL && CPU_SH4A
+       depends on MMU && EXPERIMENTAL && CPU_SH4A && !CPU_SH4AL_DSP
        help
          If you say Y here, physical addressing will be extended to
          32-bits through the SH-4A PMB. If this is not set, legacy
@@@ -104,7 -103,7 +103,7 @@@
  
  config PMB_FIXED
        bool "fixed PMB"
-       depends on MMU && EXPERIMENTAL && CPU_SH4A
+       depends on MMU && EXPERIMENTAL && CPU_SH4A && !CPU_SH4AL_DSP
        select 32BIT
        help
          If this option is enabled, fixed PMB mappings are inherited
@@@ -189,24 -188,6 +188,24 @@@ config ARCH_MEMORY_PROB
        def_bool y
        depends on MEMORY_HOTPLUG
  
 +choice
 +      prompt "Page table layout"
 +      default PGTABLE_LEVELS_3 if X2TLB
 +      default PGTABLE_LEVELS_2
 +
 +config PGTABLE_LEVELS_2
 +       bool "2 Levels"
 +       help
 +         This is the default page table layout for all SuperH CPUs.
 +
 +config PGTABLE_LEVELS_3
 +       bool "3 Levels"
 +       depends on X2TLB
 +       help
 +         This enables a 3 level page table structure.
 +
 +endchoice
 +
  choice
        prompt "Kernel page size"
        default PAGE_SIZE_8KB if X2TLB
@@@ -214,13 -195,13 +213,13 @@@
  
  config PAGE_SIZE_4KB
        bool "4kB"
 -      depends on !MMU || !X2TLB
 +      depends on !MMU || !X2TLB || PGTABLE_LEVELS_3
        help
          This is the default page size used by all SuperH CPUs.
  
  config PAGE_SIZE_8KB
        bool "8kB"
 -      depends on !MMU || X2TLB
 +      depends on !MMU || X2TLB && !PGTABLE_LEVELS_3
        help
          This enables 8kB pages as supported by SH-X2 and later MMUs.
  
@@@ -232,7 -213,7 +231,7 @@@ config PAGE_SIZE_16K
  
  config PAGE_SIZE_64KB
        bool "64kB"
 -      depends on !MMU || CPU_SH4 || CPU_SH5
 +      depends on !MMU || CPU_SH4 && !PGTABLE_LEVELS_3 || CPU_SH5
        help
          This enables support for 64kB pages, possible on all SH-4
          CPUs and later.