git.openpandora.org / pandora-kernel.git / commitdiff
? search:
summary | shortlog | log | commit | commitdiff | tree
raw | patch | inline | side by side (parent: 59fcf48)
ARM: 5700/1: ARM: Introduce ARM_L1_CACHE_SHIFT to define cache line size
authorKirill A. Shutemov <kirill@shutemov.name>
Tue, 15 Sep 2009 09:23:53 +0000 (10:23 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Tue, 15 Sep 2009 21:06:38 +0000 (22:06 +0100)
Currently kernel believes that all ARM CPUs have L1_CACHE_SHIFT == 5.
It's not true at least for CPUs based on Cortex-A8.

List of CPUs with cache line size != 32 should be expanded later.

Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

No differences found
Pandora Kernel Repository