arm64: zynqmp: Enable DP for kr260, kv260, zcu100, zcu102, zcu104, zcu111
authorMichal Simek <michal.simek@amd.com>
Tue, 2 Sep 2025 08:53:33 +0000 (10:53 +0200)
committerMichal Simek <michal.simek@amd.com>
Thu, 9 Oct 2025 07:07:04 +0000 (09:07 +0200)
Upstream DP DT binding enforcing dp-connector and port description to
operate properly.

Co-developed-by: Rohit Visavalia <rohit.visavalia@amd.com>
Signed-off-by: Rohit Visavalia <rohit.visavalia@amd.com>
Co-developed-by: Nithish Kumar Naroju <nithishkumar.naroju@amd.com>
Signed-off-by: Nithish Kumar Naroju <nithishkumar.naroju@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/15e863adca11431f68d37d732cd8a453e508ad91.1756803198.git.michal.simek@amd.com
arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
arch/arm/dts/zynqmp-zcu100-revC.dts
arch/arm/dts/zynqmp-zcu102-revA.dts
arch/arm/dts/zynqmp-zcu104-revA.dts
arch/arm/dts/zynqmp-zcu104-revC.dts
arch/arm/dts/zynqmp-zcu111-revA.dts

index fbacfa9..b92dcb8 100644 (file)
                #clock-cells = <0>;
                clock-frequency = <25000000>;
        };
+       dpcon {
+               compatible = "dp-connector";
+               label = "P11";
+               type = "full-size";
+
+               port {
+                       dpcon_in: endpoint {
+                               remote-endpoint = <&dpsub_dp_out>;
+                       };
+               };
+       };
 };
 
 &i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */
        assigned-clock-rates = <27000000>, <25000000>, <300000000>;
 };
 
+&out_dp {
+       dpsub_dp_out: endpoint {
+               remote-endpoint = <&dpcon_in>;
+       };
+};
+
 &zynqmp_dpdma {
        status = "okay";
        assigned-clock-rates = <600000000>;
index 3c36eb5..d7351a1 100644 (file)
                #clock-cells = <0>;
                clock-frequency = <27000000>;
        };
+       dpcon {
+               compatible = "dp-connector";
+               label = "P11";
+               type = "full-size";
+
+               port {
+                       dpcon_in: endpoint {
+                               remote-endpoint = <&dpsub_dp_out>;
+                       };
+               };
+       };
 };
 
 &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
        assigned-clock-rates = <27000000>, <25000000>, <300000000>;
 };
 
+&out_dp {
+       dpsub_dp_out: endpoint {
+               remote-endpoint = <&dpcon_in>;
+       };
+};
+
 &zynqmp_dpdma {
        status = "okay";
        assigned-clock-rates = <600000000>;
index 3542844..4ec8a40 100644 (file)
                #clock-cells = <0>;
                clock-frequency = <27000000>;
        };
+
+       dpcon {
+               compatible = "dp-connector";
+               label = "P11";
+               type = "full-size";
+
+               port {
+                       dpcon_in: endpoint {
+                               remote-endpoint = <&dpsub_dp_out>;
+                       };
+               };
+       };
 };
 
 &dcc {
        phys = <&psgtr 1 PHY_TYPE_DP 0 1>,
               <&psgtr 0 PHY_TYPE_DP 1 1>;
 };
+
+&out_dp {
+       dpsub_dp_out: endpoint {
+               remote-endpoint = <&dpcon_in>;
+       };
+};
index 955810a..7fa77b5 100644 (file)
                #clock-cells = <0>;
                clock-frequency = <114285000>;
        };
+
+       dpcon {
+               compatible = "dp-connector";
+               label = "P11";
+               type = "full-size";
+
+               port {
+                       dpcon_in: endpoint {
+                               remote-endpoint = <&dpsub_dp_out>;
+                       };
+               };
+       };
 };
 
 &can1 {
        phy-names = "dp-phy0";
        phys = <&psgtr 1 PHY_TYPE_DP 0 3>;
 };
+
+&out_dp {
+       dpsub_dp_out: endpoint {
+               remote-endpoint = <&dpcon_in>;
+       };
+};
index 64d8222..135bfa0 100644 (file)
                #clock-cells = <0>;
                clock-frequency = <27000000>;
        };
+
+       dpcon {
+               compatible = "dp-connector";
+               label = "P11";
+               type = "full-size";
+
+               port {
+                       dpcon_in: endpoint {
+                               remote-endpoint = <&dpsub_dp_out>;
+                       };
+               };
+       };
 };
 
 &can1 {
        phys = <&psgtr 1 PHY_TYPE_DP 0 3>,
               <&psgtr 0 PHY_TYPE_DP 1 3>;
 };
+
+&out_dp {
+       dpsub_dp_out: endpoint {
+               remote-endpoint = <&dpcon_in>;
+       };
+};
index 3e883d7..20d17a0 100644 (file)
                #clock-cells = <0>;
                clock-frequency = <27000000>;
        };
+
+       dpcon {
+               compatible = "dp-connector";
+               label = "P11";
+               type = "full-size";
+
+               port {
+                       dpcon_in: endpoint {
+                               remote-endpoint = <&dpsub_dp_out>;
+                       };
+               };
+       };
 };
 
 &can1 {
        phys = <&psgtr 1 PHY_TYPE_DP 0 3>,
               <&psgtr 0 PHY_TYPE_DP 1 3>;
 };
+
+&out_dp {
+       dpsub_dp_out: endpoint {
+               remote-endpoint = <&dpcon_in>;
+       };
+};
index 3a1580d..cfb4f64 100644 (file)
                #clock-cells = <0>;
                clock-frequency = <48000000>;
        };
+
+       dpcon {
+               compatible = "dp-connector";
+               label = "P11";
+               type = "full-size";
+
+               port {
+                       dpcon_in: endpoint {
+                               remote-endpoint = <&dpsub_dp_out>;
+                       };
+               };
+       };
 };
 
 &dcc {
        phys = <&psgtr 1 PHY_TYPE_DP 0 1>,
               <&psgtr 0 PHY_TYPE_DP 1 1>;
 };
+
+&out_dp {
+       dpsub_dp_out: endpoint {
+               remote-endpoint = <&dpcon_in>;
+       };
+};