pci: mvebu: Unable to assign mbus windows for 2nd pcie controller

Correct the memory and IO mbus windows size increments in mvebu_pcie_bind.

Currently, pcie1 controller resource_size(&mem) and resource_size(&io)
checks result in a failure. This is because mem.end and io.end must be
incremented at the end of pcie0 windows assignment.

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <stefan.roese@mailbox.org>

diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c
index 7781551..3985bd5 100644 (file)
--- a/drivers/pci/pci_mvebu.c
+++ b/drivers/pci/pci_mvebu.c
@@ -763,6 +763,7 @@ static int mvebu_pcie_bind(struct udevice *parent)
                        pcie->mem.start = mem.start;
                        pcie->mem.end = mem.start + SZ_128M - 1;
                        mem.start += SZ_128M;
+                       mem.end = mem.start + SZ_128M - 1;
                } else {
                        printf("%s: unable to assign mbus window for mem\n", pcie->name);
                        pcie->mem.start = 0;
@@ -773,6 +774,7 @@ static int mvebu_pcie_bind(struct udevice *parent)
                        pcie->io.start = io.start;
                        pcie->io.end = io.start + SZ_64K - 1;
                        io.start += SZ_64K;
+                       io.end = io.start + SZ_64K - 1;
                } else {
                        printf("%s: unable to assign mbus window for io\n", pcie->name);
                        pcie->io.start = 0;