Support for ES2.2 pandaboard
authorSebastien Jan <s-jan@ti.com>
Fri, 28 Jan 2011 19:22:21 +0000 (00:52 +0530)
committerAnand Gadiyar <gadiyar@ti.com>
Fri, 28 Jan 2011 19:22:21 +0000 (00:52 +0530)
Mostly inspired from Dan Murphy's patch on dev.omapzoom.org
x-loader tree:
    X-Loader: Change for the ES2.2 support

    Modified the OMAP revision code to only compare
    the upper nibble of the most significant byte as this
    denotes the OMAP revision.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Sebastien Jan <s-jan@ti.com>
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
board/omap4430panda/clock.c
board/omap4430panda/omap4430panda.c
cpu/omap4/cpu.c
include/asm/arch-omap4/cpu.h
include/asm/arch-omap4/omap4430.h

index 2256b32..a83f1c6 100644 (file)
@@ -423,7 +423,7 @@ static void configure_core_dpll(clk_index)
                dpll_param_p = &core_dpll_param_l3_190[clk_index];
        else if(omap_revision() == OMAP4430_ES2_0)
                dpll_param_p = &core_dpll_param[clk_index];
-       else if(omap_revision() == OMAP4430_ES2_1)
+       else if(omap_revision() >= OMAP4430_ES2_1)
                dpll_param_p = &core_dpll_param_ddr400[clk_index];
 
        /* Disable autoidle */
@@ -482,7 +482,7 @@ void configure_core_dpll_no_lock(void)
                dpll_param_p = &core_dpll_param_l3_190[clk_index];
        else if(omap_revision() == OMAP4430_ES2_0)
                dpll_param_p = &core_dpll_param[clk_index];
-       else if(omap_revision() == OMAP4430_ES2_1)
+       else if(omap_revision() >= OMAP4430_ES2_1)
                dpll_param_p = &core_dpll_param_ddr400[clk_index];
 
        /* Disable autoidle */
@@ -530,7 +530,7 @@ void lock_core_dpll_shadow(void)
                dpll_param_p = &core_dpll_param_l3_190[6];
        else if(omap_revision() == OMAP4430_ES2_0)
                dpll_param_p = &core_dpll_param[6];
-       else if(omap_revision() == OMAP4430_ES2_1)
+       else if(omap_revision() >= OMAP4430_ES2_1)
                dpll_param_p = &core_dpll_param_ddr400[6];
 
        /* CM_SHADOW_FREQ_CONFIG1: DLL_OVERRIDE = 1(hack), DLL_RESET = 1,
index 5695733..a91e2aa 100644 (file)
@@ -252,7 +252,7 @@ static int emif_config(unsigned int base)
                ddr_regs = &ddr_regs_380_mhz;
        else if (rev == OMAP4430_ES2_0)
                ddr_regs = &ddr_regs_200_mhz_2cs;
-       else if (rev == OMAP4430_ES2_1)
+       else if (rev >= OMAP4430_ES2_1)
                ddr_regs = &ddr_regs_400_mhz_2cs;
        /*
         * set SDRAM CONFIG register
@@ -602,7 +602,7 @@ static scale_vcores(void)
                *(volatile int*)(0x4A307BA0) = 0x316112;
        else if (rev == OMAP4430_ES2_0)
                *(volatile int*)(0x4A307BA0) = 0x296112;
-       else if (rev == OMAP4430_ES2_1)
+       else if (rev >= OMAP4430_ES2_1)
                *(volatile int*)(0x4A307BA0) = 0x2A6112;
        *(volatile int*)(0x4A307BA0) |= 0x1000000;
        while((*(volatile int*)(0x4A307BA0)) & 0x1000000);
index 698bbdf..7306fc1 100644 (file)
@@ -63,17 +63,20 @@ unsigned int cortex_a9_rev(void)
 
 unsigned int omap_revision(void)
 {
+       unsigned int chip_rev = 0;
        unsigned int rev = cortex_a9_rev();
 
        switch(rev) {
        case 0x410FC091:
                return OMAP4430_ES1_0;
        case 0x411FC092:
-               if (__raw_readl(0x4a002204) == 0x3b95c02f)
+               chip_rev = (__raw_readl(OMAP44XX_CTRL_ID_CODE)  >> 28) & 0xF;
+               if (chip_rev == 3)
                        return OMAP4430_ES2_1;
+               else if (chip_rev >= 4)
+                       return OMAP4430_ES2_2;
                else
                        return OMAP4430_ES2_0;
-       default:
-               return OMAP4430_SILICON_ID_INVALID;
        }
+       return OMAP4430_SILICON_ID_INVALID;
 }
index 94aeb9f..4971ba4 100644 (file)
 #define OMAP4430_ES1_0 1
 #define OMAP4430_ES2_0 2
 #define OMAP4430_ES2_1 3
+#define OMAP4430_ES2_2 4
 
 #ifndef        __ASSEMBLY__
 /*Functions for silicon revision */
index 2f83621..46003d1 100644 (file)
@@ -64,7 +64,9 @@
 #define OMAP44XX_L4_IO_BASE            OMAP44XX_CORE_L4_IO_BASE
 
 /* CONTROL */
-//#define OMAP44XX_CTRL_BASE           (OMAP44XX_L4_IO_BASE+0x2000)
+#define OMAP44XX_CTRL_GEN_CORE_BASE    (OMAP44XX_L4_IO_BASE+0x2000)
+#define OMAP44XX_CTRL_ID_CODE          (OMAP44XX_CTRL_GEN_CORE_BASE + 0x204)
+
 #define OMAP44XX_CTRL_BASE             0x4a100000
 
 /* TAP information  dont know for 3430*/