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drm/radeon: enable mgcg on CIK
authorAlex Deucher <alexander.deucher@amd.com>
Wed, 14 Aug 2013 22:58:43 +0000 (18:58 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 30 Aug 2013 20:30:58 +0000 (16:30 -0400)
Now that the CP is no longer reset and cg is properly
disabled in when appropriate in the dpm code we can
now enable mgcg (medium grained clockgating).

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/radeon_asic.c patch | blob | history

diff --cc drivers/gpu/drm/radeon/radeon_asic.c
Simple merge
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