ASoC: rt5677: add register patch for PLL
authorBard Liao <bardliao@realtek.com>
Fri, 24 Apr 2015 07:19:29 +0000 (15:19 +0800)
committerMark Brown <broonie@kernel.org>
Fri, 24 Apr 2015 10:06:54 +0000 (11:06 +0100)
The PLL output will be unstable in some cases. We can fix it by
setting some registers.

Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
sound/soc/codecs/rt5677.c

index 5d0bb87..c6d4e8f 100644 (file)
@@ -62,6 +62,9 @@ static const struct reg_default init_list[] = {
        {RT5677_PR_BASE + 0x1e, 0x0000},
        {RT5677_PR_BASE + 0x12, 0x0eaa},
        {RT5677_PR_BASE + 0x14, 0x018a},
+       {RT5677_PR_BASE + 0x15, 0x0490},
+       {RT5677_PR_BASE + 0x38, 0x0f71},
+       {RT5677_PR_BASE + 0x39, 0x0f71},
 };
 #define RT5677_INIT_REG_LEN ARRAY_SIZE(init_list)