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MIPS: Fix TLBR-use hazards for R2 cores in the TLB reload handlers
author
Ralf Baechle
<ralf@linux-mips.org>
Thu, 20 Jun 2013 12:56:17 +0000
(14:56 +0200)
committer
Ralf Baechle
<ralf@linux-mips.org>
Fri, 21 Jun 2013 16:07:03 +0000
(18:07 +0200)
MIPS R2 documents state that an execution hazard barrier is needed
after a TLBR before reading EntryLo.
Original patch by Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/5526/
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git.openpandora.org / pandora-kernel.git / commitdiff