arm64: zynqmp: Disable coresight by default

When secure-boot mode of bootloader is enabled, the registers of
coresight are not permitted to access that's why disable it by default.

Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1ea8e5bdb9bfdcc1fc6670bf4b4e13c40fbdc00c.1756803198.git.michal.simek@amd.com

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 0e0436e..9f3404e 100644 (file)
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -547,6 +547,7 @@
                        reg = <0x0 0xfec10000 0x0 0x1000>;
                        clock-names = "apb_pclk";
                        cpu = <&cpu0>;
+                       status = "disabled";
                };
 
                cpu1_debug: debug@fed10000 {
@@ -554,6 +555,7 @@
                        reg = <0x0 0xfed10000 0x0 0x1000>;
                        clock-names = "apb_pclk";
                        cpu = <&cpu1>;
+                       status = "disabled";
                };
 
                cpu2_debug: debug@fee10000 {
@@ -561,6 +563,7 @@
                        reg = <0x0 0xfee10000 0x0 0x1000>;
                        clock-names = "apb_pclk";
                        cpu = <&cpu2>;
+                       status = "disabled";
                };
 
                cpu3_debug: debug@fef10000 {
@@ -568,6 +571,7 @@
                        reg = <0x0 0xfef10000 0x0 0x1000>;
                        clock-names = "apb_pclk";
                        cpu = <&cpu3>;
+                       status = "disabled";
                };
 
                /* GDMA */