PCI: Use u8, not int, for PM capability offset
authorBjorn Helgaas <bhelgaas@google.com>
Wed, 17 Apr 2013 22:57:56 +0000 (16:57 -0600)
committerBjorn Helgaas <bhelgaas@google.com>
Tue, 23 Apr 2013 15:50:30 +0000 (09:50 -0600)
The Power Management Capability (PCI_CAP_ID_PM == 0x01) is defined by PCI
and must appear in the 256-byte PCI Configuration Space from 0-0xff.  It
cannot be in the PCIe Extended Configuration space from 0x100-0xfff, so
we only need a u8 to hold its offset.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
include/linux/pci.h

index 2461033..9587d4d 100644 (file)
@@ -249,8 +249,7 @@ struct pci_dev {
        pci_power_t     current_state;  /* Current operating state. In ACPI-speak,
                                           this is D0-D3, D0 being fully functional,
                                           and D3 being off. */
-       int             pm_cap;         /* PM capability offset in the
-                                          configuration space */
+       u8              pm_cap;         /* PM capability offset */
        unsigned int    pme_support:5;  /* Bitmask of states from which PME#
                                           can be generated */
        unsigned int    pme_interrupt:1;