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rockchip: boot0: update CONFIG_ROCKCHIP_SPL_RESERVE_IRAM for SPL only
authorKever Yang <kever.yang@rock-chips.com>
Fri, 29 Mar 2019 14:48:28 +0000 (22:48 +0800)
committerKever Yang <kever.yang@rock-chips.com>
Wed, 8 May 2019 09:34:12 +0000 (17:34 +0800)
The CONFIG_ROCKCHIP_SPL_RESERVE_IRAM is for SPL only, add
condition to limit it not affect TPL.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
arch/arm/include/asm/arch-rockchip/boot0.h patch | blob | history

diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
index 9ea4708..0c375e5 100644 (file)
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -54,6 +54,7 @@ _start:
        ARM_VECTORS
 #endif
 
-#if defined(CONFIG_SPL_BUILD) && (CONFIG_ROCKCHIP_SPL_RESERVE_IRAM > 0)
+#if !defined(CONFIG_TPL_BUILD) && defined(CONFIG_SPL_BUILD) && \
+       (CONFIG_ROCKCHIP_SPL_RESERVE_IRAM > 0)
        .space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM /* space for the ATF data */
 #endif
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