TI: DaVinci DM646x: Update flag used to represent DM646x SOC's
authorSandeep Paulraj <s-paulraj@ti.com>
Fri, 18 Sep 2009 21:30:05 +0000 (17:30 -0400)
committerTom Rix <Tom.Rix@windriver.com>
Sun, 4 Oct 2009 15:51:31 +0000 (10:51 -0500)
In the DaVinci specific code, we use both CONFIG_SOC_DM646X and
CONFIG_SOC_DM646x to represent DM646x specific code.
This patch changes occurrences of CONFIG_SOC_DM646x to
CONFIG_SOC_DM646X. This is because for DM644x series of SOCs we use
the flag CONFIG_SOC_DM644X. We want some uniformity.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
include/asm-arm/arch-davinci/emac_defs.h
include/asm-arm/arch-davinci/nand_defs.h

index ae75f84..96bc80e 100644 (file)
@@ -50,7 +50,7 @@
 #define EMAC_MDIO_BASE_ADDR            (0x01c84000)
 #endif
 
-#ifdef CONFIG_SOC_DM646x
+#ifdef CONFIG_SOC_DM646X
 /* MDIO module input frequency */
 #define EMAC_MDIO_BUS_FREQ             76500000
 /* MDIO clock output frequency */
@@ -283,7 +283,7 @@ typedef struct  {
 
 /* EMAC Wrapper Registers Structure */
 typedef struct  {
-#if defined(CONFIG_SOC_DM646x) || defined(CONFIG_SOC_DM365)
+#if defined(CONFIG_SOC_DM646X) || defined(CONFIG_SOC_DM365)
        dv_reg          IDVER;
        dv_reg          SOFTRST;
        dv_reg          EMCTRL;
index 386540e..10f3a39 100644 (file)
@@ -28,7 +28,7 @@
 
 #include <asm/arch/hardware.h>
 
-#ifdef CONFIG_SOC_DM646x
+#ifdef CONFIG_SOC_DM646X
 #define        MASK_CLE        0x80000
 #define        MASK_ALE        0x40000
 #else