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riscv: Extend board compatible string with "qemu,mbv"
author
Michal Simek
<michal.simek@amd.com>
Wed, 20 Dec 2023 14:53:28 +0000
(15:53 +0100)
committer
Leo Yu-Chi Liang
<ycliang@andestech.com>
Wed, 27 Dec 2023 09:29:02 +0000
(17:29 +0800)
Extend compatible string to match the latest change in dt binding.
Fixes:
7576ab2facae
("riscv: Add support for AMD/Xilinx MicroBlaze V")
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
arch/riscv/dts/xilinx-mbv32.dts
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diff --git
a/arch/riscv/dts/xilinx-mbv32.dts
b/arch/riscv/dts/xilinx-mbv32.dts
index
6a6b8b6
..
94e42c2
100644
(file)
--- a/
arch/riscv/dts/xilinx-mbv32.dts
+++ b/
arch/riscv/dts/xilinx-mbv32.dts
@@
-12,7
+12,7
@@
#address-cells = <1>;
#size-cells = <1>;
model = "AMD MicroBlaze V 32bit";
- compatible = "amd,mbv";
+ compatible = "
qemu,mbv", "
amd,mbv";
cpus: cpus {
#address-cells = <1>;