static struct map_desc cl7500_io_desc[] __initdata = {
{ /* IO space */
- .virtual = IO_BASE,
+ .virtual = (unsigned long)IO_BASE,
.pfn = __phys_to_pfn(IO_START),
.length = IO_SIZE,
.type = MT_DEVICE
#include <linux/kernel.h>
#include <linux/init.h>
-#include <linux/device.h>
+#include <linux/platform_device.h>
#include <linux/major.h>
#include <linux/fs.h>
#include <linux/interrupt.h>
GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */
GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */
GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */
- for(i = 100; i--; scr = GPLR); /* Read GPIO 9:2 */
+ for(i = 100; i--; ) /* Read GPIO 9:2 */
+ scr = GPLR;
GPDR |= 0x3fc; /* restore correct pin direction */
scr &= 0x3fc; /* save as system configuration byte. */
SCR_value = scr;
#define writew(v,b) __writew(v,b)
#define writel(v,b) __writel(v,b)
-#define __arch_ioremap(cookie,sz,c,a) ((void __iomem *)(cookie))
+#define __arch_ioremap(cookie,sz,c) ((void __iomem *)(cookie))
#define __arch_iounmap(cookie) do { } while (0)
extern void insb(unsigned int port, void *buf, int sz);
* Queue Manager
*/
#define IXP4XX_QMGR_BASE_PHYS (0x60000000)
+#define IXP4XX_QMGR_REGION_SIZE (0x00004000)
/*
* Expansion BUS Configuration registers
#ifndef __ASM_ARM_NUMNODES_H
#define __ASM_ARM_NUMNODES_H
+#include <asm/memory.h>
+
#ifndef NODES_SHIFT
# define NODES_SHIFT 2 /* Normally, Max 4 Nodes */
#endif