drm/radeon/kms: add info query for tile pipes
authorAlex Deucher <alexdeucher@gmail.com>
Tue, 26 Apr 2011 17:27:43 +0000 (13:27 -0400)
committerDave Airlie <airlied@redhat.com>
Wed, 27 Apr 2011 07:03:56 +0000 (17:03 +1000)
needed by mesa for htile setup.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/radeon_kms.c
include/drm/radeon_drm.h

index bf7d4c0..871df03 100644 (file)
@@ -221,6 +221,19 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
                        return -EINVAL;
                }
                break;
+       case RADEON_INFO_NUM_TILE_PIPES:
+               if (rdev->family >= CHIP_CAYMAN)
+                       value = rdev->config.cayman.max_tile_pipes;
+               else if (rdev->family >= CHIP_CEDAR)
+                       value = rdev->config.evergreen.max_tile_pipes;
+               else if (rdev->family >= CHIP_RV770)
+                       value = rdev->config.rv770.max_tile_pipes;
+               else if (rdev->family >= CHIP_R600)
+                       value = rdev->config.r600.max_tile_pipes;
+               else {
+                       return -EINVAL;
+               }
+               break;
        default:
                DRM_DEBUG_KMS("Invalid request %d\n", info->request);
                return -EINVAL;
index 3bce1a4..7aa5ddd 100644 (file)
@@ -909,6 +909,7 @@ struct drm_radeon_cs {
 #define RADEON_INFO_WANT_CMASK         0x08 /* get access to CMASK on r300 */
 #define RADEON_INFO_CLOCK_CRYSTAL_FREQ 0x09 /* clock crystal frequency */
 #define RADEON_INFO_NUM_BACKENDS       0x0a /* DB/backends for r600+ - need for OQ */
+#define RADEON_INFO_NUM_TILE_PIPES     0x0b /* tile pipes for r600+ */
 
 struct drm_radeon_info {
        uint32_t                request;