staging: comedi: ni_stc.h: tidy up AO_Personal_Register and bits

Rename the CamelCase. Use the BIT() macro to define the bits.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/comedi/drivers/ni_mio_common.c b/drivers/staging/comedi/drivers/ni_mio_common.c
index 5e0c527..3d4f876 100644 (file)
--- a/drivers/staging/comedi/drivers/ni_mio_common.c
+++ b/drivers/staging/comedi/drivers/ni_mio_common.c
@@ -371,7 +371,7 @@ static const struct mio_regmap m_series_stc_write_regmap[] = {
        [NISTC_INTB_ENA_REG]            = { 0x196, 2 },
        [NISTC_INTB2_ENA_REG]           = { 0, 0 }, /* E-Series only */
        [NISTC_AI_PERSONAL_REG]         = { 0x19a, 2 },
-       [AO_Personal_Register]          = { 0x19c, 2 },
+       [NISTC_AO_PERSONAL_REG]         = { 0x19c, 2 },
        [RTSI_Trig_A_Output_Register]   = { 0x19e, 2 },
        [RTSI_Trig_B_Output_Register]   = { 0x1a0, 2 },
        [RTSI_Board_Register]           = { 0, 0 }, /* Unknown */
@@ -3062,19 +3062,22 @@ static int ni_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
        devpriv->ao_mode2 &= ~NISTC_AO_MODE2_FIFO_REXMIT_ENA;
        ni_stc_writew(dev, devpriv->ao_mode2, NISTC_AO_MODE2_REG);
 
-       bits = AO_BC_Source_Select | AO_UPDATE_Pulse_Width |
-           AO_TMRDACWR_Pulse_Width;
+       bits = NISTC_AO_PERSONAL_BC_SRC_SEL |
+              NISTC_AO_PERSONAL_UPDATE_PW |
+              NISTC_AO_PERSONAL_TMRDACWR_PW;
        if (board->ao_fifo_depth)
-               bits |= AO_FIFO_Enable;
+               bits |= NISTC_AO_PERSONAL_FIFO_ENA;
        else
-               bits |= AO_DMA_PIO_Control;
+               bits |= NISTC_AO_PERSONAL_DMA_PIO_CTRL;
 #if 0
-       /* F Hess: windows driver does not set AO_Number_Of_DAC_Packages bit for 6281,
-          verified with bus analyzer. */
+       /*
+        * F Hess: windows driver does not set NISTC_AO_PERSONAL_NUM_DAC bit
+        * for 6281, verified with bus analyzer.
+        */
        if (devpriv->is_m_series)
-               bits |= AO_Number_Of_DAC_Packages;
+               bits |= NISTC_AO_PERSONAL_NUM_DAC;
 #endif
-       ni_stc_writew(dev, bits, AO_Personal_Register);
+       ni_stc_writew(dev, bits, NISTC_AO_PERSONAL_REG);
        /*  enable sending of ao dma requests */
        ni_stc_writew(dev, NISTC_AO_START_AOFREQ_ENA, NISTC_AO_START_SEL_REG);
 
@@ -3184,10 +3187,12 @@ static int ni_ao_reset(struct comedi_device *dev, struct comedi_subdevice *s)
        ni_stc_writew(dev, NISTC_RESET_AO_CFG_START, NISTC_RESET_REG);
        ni_stc_writew(dev, NISTC_AO_CMD1_DISARM, NISTC_AO_CMD1_REG);
        ni_set_bits(dev, NISTC_INTB_ENA_REG, ~0, 0);
-       ni_stc_writew(dev, AO_BC_Source_Select, AO_Personal_Register);
+       ni_stc_writew(dev, NISTC_AO_PERSONAL_BC_SRC_SEL, NISTC_AO_PERSONAL_REG);
        ni_stc_writew(dev, NISTC_INTB_ACK_AO_ALL, NISTC_INTB_ACK_REG);
-       ni_stc_writew(dev, AO_BC_Source_Select | AO_UPDATE_Pulse_Width |
-                     AO_TMRDACWR_Pulse_Width, AO_Personal_Register);
+       ni_stc_writew(dev, NISTC_AO_PERSONAL_BC_SRC_SEL |
+                          NISTC_AO_PERSONAL_UPDATE_PW |
+                          NISTC_AO_PERSONAL_TMRDACWR_PW,
+                     NISTC_AO_PERSONAL_REG);
        ni_stc_writew(dev, 0, AO_Output_Control_Register);
        ni_stc_writew(dev, 0, NISTC_AO_START_SEL_REG);
        devpriv->ao_cmd1 = 0;

diff --git a/drivers/staging/comedi/drivers/ni_stc.h b/drivers/staging/comedi/drivers/ni_stc.h
index 27f21fa..333114f 100644 (file)
--- a/drivers/staging/comedi/drivers/ni_stc.h
+++ b/drivers/staging/comedi/drivers/ni_stc.h
@@ -433,6 +433,21 @@
 #define NISTC_AI_PERSONAL_LOCALMUX_CLK_PW      BIT(5)
 #define NISTC_AI_PERSONAL_AIFREQ_POL           BIT(4)
 
+#define NISTC_AO_PERSONAL_REG          78
+#define NISTC_AO_PERSONAL_MULTI_DACS           BIT(15) /* M-Series only */
+#define NISTC_AO_PERSONAL_NUM_DAC              BIT(14) /* 1:single; 0:dual */
+#define NISTC_AO_PERSONAL_FAST_CPU             BIT(13) /* M-Series reserved */
+#define NISTC_AO_PERSONAL_TMRDACWR_PW          BIT(12)
+#define NISTC_AO_PERSONAL_FIFO_FLAGS_POL       BIT(11) /* M-Series reserved */
+#define NISTC_AO_PERSONAL_FIFO_ENA             BIT(10)
+#define NISTC_AO_PERSONAL_AOFREQ_POL           BIT(9)  /* M-Series reserved */
+#define NISTC_AO_PERSONAL_DMA_PIO_CTRL         BIT(8)  /* M-Series reserved */
+#define NISTC_AO_PERSONAL_UPDATE_ORIG_PULSE    BIT(7)
+#define NISTC_AO_PERSONAL_UPDATE_TIMEBASE      BIT(6)
+#define NISTC_AO_PERSONAL_UPDATE_PW            BIT(5)
+#define NISTC_AO_PERSONAL_BC_SRC_SEL           BIT(4)
+#define NISTC_AO_PERSONAL_INTERVAL_BUFFER_MODE BIT(3)
+
 #define AI_Status_1_Register           2
 #define Interrupt_A_St                         0x8000
 #define AI_FIFO_Full_St                                0x4000
@@ -491,22 +506,6 @@ enum Joint_Status_2_Bits {
 #define AO_BC_Save_Registers           18
 #define AO_UC_Save_Registers           20
 
-#define AO_Personal_Register           78
-enum AO_Personal_Bits {
-       AO_Interval_Buffer_Mode = 1 << 3,
-       AO_BC_Source_Select = 1 << 4,
-       AO_UPDATE_Pulse_Width = 1 << 5,
-       AO_UPDATE_Pulse_Timebase = 1 << 6,
-       AO_UPDATE_Original_Pulse = 1 << 7,
-       AO_DMA_PIO_Control = 1 << 8,    /* M Series: reserved */
-       AO_AOFREQ_Polarity = 1 << 9,    /* M Series: reserved */
-       AO_FIFO_Enable = 1 << 10,
-       AO_FIFO_Flags_Polarity = 1 << 11,       /* M Series: reserved */
-       AO_TMRDACWR_Pulse_Width = 1 << 12,
-       AO_Fast_CPU = 1 << 13,  /* M Series: reserved */
-       AO_Number_Of_DAC_Packages = 1 << 14,    /*  1 for "single" mode, 0 for "dual" */
-       AO_Multiple_DACS_Per_Package = 1 << 15  /*  m-series only */
-};
 #define        RTSI_Trig_A_Output_Register     79
 #define        RTSI_Trig_B_Output_Register     80
 enum RTSI_Trig_B_Output_Bits {