support all OMAP3s with single build
authorGrazvydas Ignotas <notasas@gmail.com>
Sun, 10 Feb 2013 22:49:58 +0000 (00:49 +0200)
committerGrazvydas Ignotas <notasas@gmail.com>
Mon, 11 Feb 2013 01:49:36 +0000 (03:49 +0200)
Makefile
services4/system/omap3/sysconfig.c
services4/system/omap3/sysconfig.h
services4/system/omap3/sysutils_linux.c
services4/system/omap3/sysutils_linux_wqueue_compat.c

index 2daf6a9..e192fc6 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -5,6 +5,8 @@ export KERNEL_SRC=$(KERNELDIR)
 export KDIR=$(KERNELDIR)
 
 export BUILD = release
+export TI_PLATFORM ?= omap3
+export OMAPES ?= 3.x
 
 export KBUILD_EXTRA_SYMBOLS = `pwd`/services4/srvkm/env/linux/kbuild/Module.symvers
 
index b9dd81c..4773f87 100644 (file)
@@ -36,7 +36,7 @@
 
 #if !defined(NO_HARDWARE) && \
      defined(SYS_USING_INTERRUPTS) && \
-     defined(SGX530) && (SGX_CORE_REV == 125)
+     defined(SGX530) // && (SGX_CORE_REV == 125)
 #define SGX_OCP_REGS_ENABLED
 #endif
 
@@ -165,7 +165,7 @@ static PVRSRV_ERROR EnableSGXClocksWrap(SYS_DATA *psSysData)
 {
        PVRSRV_ERROR eError = EnableSGXClocks(psSysData);
 
-       if(eError == PVRSRV_OK)
+       if(cpu_is_omap3630() && eError == PVRSRV_OK)
        {
                OSWriteHWReg(gpvOCPRegsLinAddr,
                                         EUR_CR_OCP_DEBUG_CONFIG - EUR_CR_OCP_REVISION,
@@ -376,7 +376,7 @@ PVRSRV_ERROR SysInitialise(IMG_VOID)
 #if !defined(SGX_DYNAMIC_TIMING_INFO)
        
        psTimingInfo = &gsSGXDeviceMap.sTimingInfo;
-       psTimingInfo->ui32CoreClockSpeed = SYS_SGX_CLOCK_SPEED;
+       psTimingInfo->ui32CoreClockSpeed = cpu_is_omap3630() ? 200000000 : 110666666;
        psTimingInfo->ui32HWRecoveryFreq = SYS_SGX_HWRECOVERY_TIMEOUT_FREQ; 
 #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
        psTimingInfo->bEnableActivePM = IMG_TRUE;
@@ -406,6 +406,7 @@ PVRSRV_ERROR SysInitialise(IMG_VOID)
        SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LOCATEDEV);
 
 #if defined(SGX_OCP_REGS_ENABLED)
+       if (cpu_is_omap3630())
        {
                IMG_SYS_PHYADDR sOCPRegsSysPBase;
                IMG_CPU_PHYADDR sOCPRegsCpuPBase;
@@ -637,7 +638,8 @@ PVRSRV_ERROR SysDeinitialise (SYS_DATA *psSysData)
        }
        
 #if defined(SGX_OCP_REGS_ENABLED)
-       OSUnMapPhysToLin(gpvOCPRegsLinAddr,
+       if (cpu_is_omap3630())
+               OSUnMapPhysToLin(gpvOCPRegsLinAddr,
                                         SYS_OMAP3430_OCP_REGS_SIZE,
                                         PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY,
                                         IMG_NULL);
index c1f5e10..99b6ebe 100644 (file)
@@ -47,7 +47,7 @@
 
 #define SYS_OMAP3430_SGX_REGS_SYS_PHYS_BASE  0x50000000
 
-#define SYS_OMAP3430_SGX_REGS_SIZE           0x4000
+#define SYS_OMAP3430_SGX_REGS_SIZE           0x10000
 
 #define SYS_OMAP3430_SGX_IRQ                            21
 
index bfb359b..8e45f36 100644 (file)
 #define SGX_PARENT_CLOCK "core_ck"
 #endif
 
+#undef SYS_SGX_CLOCK_SPEED
+#define SYS_SGX_CLOCK_SPEED sgx_clock_speed
+static int sgx_clock_speed;
+
 #if !defined(PDUMP) && !defined(NO_HARDWARE)
 static IMG_BOOL PowerLockWrappedOnCPU(SYS_SPECIFIC_DATA *psSysSpecData)
 {
@@ -478,6 +482,16 @@ PVRSRV_ERROR EnableSGXClocks(SYS_DATA *psSysData)
                PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: SGX Functional Clock is %dMhz", HZ_TO_MHZ(rate)));
        }
 #endif
+#if 1
+       {
+               static int logged;
+               IMG_UINT32 rate = clk_get_rate(psSysSpecData->psSGX_FCK);
+               if (!logged) {
+                       printk(KERN_INFO "SGX clock rate: %u\n", rate);
+                       logged = 1;
+               }
+       }
+#endif
 
        
        atomic_set(&psSysSpecData->sSGXClocksEnabled, 1);
@@ -543,6 +557,8 @@ PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
        {
                bPowerLock = IMG_FALSE;
 
+               sgx_clock_speed = cpu_is_omap3630() ? 200000000 : 110666666;
+
                spin_lock_init(&psSysSpecData->sPowerLock);
                atomic_set(&psSysSpecData->sPowerLockCPU, -1);
                spin_lock_init(&psSysSpecData->sNotifyLock);
index fc8f810..cb0036c 100644 (file)
 #define SGX_PARENT_CLOCK "core_ck"
 #endif
 
+#undef SYS_SGX_CLOCK_SPEED
+#define SYS_SGX_CLOCK_SPEED sgx_clock_speed
+static int sgx_clock_speed;
+
 static PVRSRV_ERROR PowerLockWrap(SYS_SPECIFIC_DATA *psSysSpecData, IMG_BOOL bTryLock)
 {
         if (!in_interrupt())
@@ -215,6 +219,16 @@ PVRSRV_ERROR EnableSGXClocks(SYS_DATA *psSysData)
                PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: SGX Functional Clock is %dMhz", HZ_TO_MHZ(rate)));
        }
 #endif
+#if 1
+       {
+               static int logged;
+               IMG_UINT32 rate = clk_get_rate(psSysSpecData->psSGX_FCK);
+               if (!logged) {
+                       printk(KERN_INFO "SGX clock rate: %u\n", rate);
+                       logged = 1;
+               }
+       }
+#endif
 
        
        atomic_set(&psSysSpecData->sSGXClocksEnabled, 1);
@@ -281,6 +295,8 @@ PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
 
                atomic_set(&psSysSpecData->sSGXClocksEnabled, 0);
 
+               SYS_SGX_CLOCK_SPEED = cpu_is_omap3630() ? 200000000 : 110666666;
+
                psCLK = clk_get(NULL, SGX_PARENT_CLOCK);
                if (IS_ERR(psCLK))
                {