davinci: Audio support for DA850/OMAP-L138 EVM
authorChaithrika U S <chaithrika@ti.com>
Tue, 11 Aug 2009 21:03:25 +0000 (17:03 -0400)
committerKevin Hilman <khilman@deeprootsystems.com>
Wed, 26 Aug 2009 08:55:53 +0000 (11:55 +0300)
Define resources for McASP used on DA850/OMAP-L138 EVM, add platform
device defintion and Pin Mux configurations.

Signed-off-by: Chaithrika U S <chaithrika@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
arch/arm/mach-davinci/board-da850-evm.c
arch/arm/mach-davinci/da850.c
arch/arm/mach-davinci/devices-da8xx.c
arch/arm/mach-davinci/include/mach/asp.h
arch/arm/mach-davinci/include/mach/mux.h

index d989346..52bfe4c 100644 (file)
@@ -38,6 +38,28 @@ static struct davinci_uart_config da850_evm_uart_config __initdata = {
        .enabled_uarts = 0x7,
 };
 
+/* davinci da850 evm audio machine driver */
+static u8 da850_iis_serializer_direction[] = {
+       INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
+       INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
+       INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  TX_MODE,
+       RX_MODE,        INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
+};
+
+static struct snd_platform_data da850_evm_snd_data = {
+       .tx_dma_offset  = 0x2000,
+       .rx_dma_offset  = 0x2000,
+       .op_mode        = DAVINCI_MCASP_IIS_MODE,
+       .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
+       .tdm_slots      = 2,
+       .serial_dir     = da850_iis_serializer_direction,
+       .eventq_no      = EVENTQ_1,
+       .version        = MCASP_VERSION_2,
+       .txnumevt       = 1,
+       .rxnumevt       = 1,
+};
+
+
 static __init void da850_evm_init(void)
 {
        struct davinci_soc_info *soc_info = &davinci_soc_info;
@@ -86,6 +108,13 @@ static __init void da850_evm_init(void)
         */
        __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
        __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
+
+       ret = da8xx_pinmux_setup(da850_mcasp_pins);
+       if (ret)
+               pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
+                               ret);
+
+       da8xx_init_mcasp(0, &da850_evm_snd_data);
 }
 
 #ifdef CONFIG_SERIAL_8250_CONSOLE
index c5efc51..e440c09 100644 (file)
@@ -290,6 +290,13 @@ static struct clk emac_clk = {
        .psc_ctlr       = 1,
 };
 
+static struct clk mcasp_clk = {
+       .name           = "mcasp",
+       .parent         = &pll0_sysclk2,
+       .lpsc           = DA8XX_LPSC1_McASP0,
+       .psc_ctlr       = 1,
+};
+
 static struct davinci_clk da850_clks[] = {
        CLK(NULL,               "ref",          &ref_clk),
        CLK(NULL,               "pll0",         &pll0_clk),
@@ -327,6 +334,7 @@ static struct davinci_clk da850_clks[] = {
        CLK(NULL,               "arm",          &arm_clk),
        CLK(NULL,               "rmii",         &rmii_clk),
        CLK("davinci_emac.1",   NULL,           &emac_clk),
+       CLK("davinci-mcasp.0",  NULL,           &mcasp_clk),
        CLK(NULL,               NULL,           NULL),
 };
 
@@ -373,6 +381,30 @@ static const struct mux_config da850_pins[] = {
        MUX_CFG(DA850, MII_RXD_0,       3,      28,     15,     8,      false)
        MUX_CFG(DA850, MDIO_CLK,        4,      0,      15,     8,      false)
        MUX_CFG(DA850, MDIO_D,          4,      4,      15,     8,      false)
+       /* McASP function */
+       MUX_CFG(DA850,  ACLKR,          0,      0,      15,     1,      false)
+       MUX_CFG(DA850,  ACLKX,          0,      4,      15,     1,      false)
+       MUX_CFG(DA850,  AFSR,           0,      8,      15,     1,      false)
+       MUX_CFG(DA850,  AFSX,           0,      12,     15,     1,      false)
+       MUX_CFG(DA850,  AHCLKR,         0,      16,     15,     1,      false)
+       MUX_CFG(DA850,  AHCLKX,         0,      20,     15,     1,      false)
+       MUX_CFG(DA850,  AMUTE,          0,      24,     15,     1,      false)
+       MUX_CFG(DA850,  AXR_15,         1,      0,      15,     1,      false)
+       MUX_CFG(DA850,  AXR_14,         1,      4,      15,     1,      false)
+       MUX_CFG(DA850,  AXR_13,         1,      8,      15,     1,      false)
+       MUX_CFG(DA850,  AXR_12,         1,      12,     15,     1,      false)
+       MUX_CFG(DA850,  AXR_11,         1,      16,     15,     1,      false)
+       MUX_CFG(DA850,  AXR_10,         1,      20,     15,     1,      false)
+       MUX_CFG(DA850,  AXR_9,          1,      24,     15,     1,      false)
+       MUX_CFG(DA850,  AXR_8,          1,      28,     15,     1,      false)
+       MUX_CFG(DA850,  AXR_7,          2,      0,      15,     1,      false)
+       MUX_CFG(DA850,  AXR_6,          2,      4,      15,     1,      false)
+       MUX_CFG(DA850,  AXR_5,          2,      8,      15,     1,      false)
+       MUX_CFG(DA850,  AXR_4,          2,      12,     15,     1,      false)
+       MUX_CFG(DA850,  AXR_3,          2,      16,     15,     1,      false)
+       MUX_CFG(DA850,  AXR_2,          2,      20,     15,     1,      false)
+       MUX_CFG(DA850,  AXR_1,          2,      24,     15,     1,      false)
+       MUX_CFG(DA850,  AXR_0,          2,      28,     15,     1,      false)
 #endif
 };
 
@@ -410,6 +442,13 @@ const short da850_cpgmac_pins[] __initdata = {
        -1
 };
 
+const short da850_mcasp_pins[] __initdata = {
+       DA850_AHCLKX, DA850_ACLKX, DA850_AFSX,
+       DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE,
+       DA850_AXR_11, DA850_AXR_12,
+       -1
+};
+
 /* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
 static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = {
        [IRQ_DA8XX_COMMTX]              = 7,
index fe0baaf..1882eef 100644 (file)
@@ -309,6 +309,34 @@ static struct platform_device da830_mcasp1_device = {
        .resource       = da830_mcasp1_resources,
 };
 
+static struct resource da850_mcasp_resources[] = {
+       {
+               .name   = "mcasp",
+               .start  = DAVINCI_DA8XX_MCASP0_REG_BASE,
+               .end    = DAVINCI_DA8XX_MCASP0_REG_BASE + (SZ_1K * 12) - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       /* TX event */
+       {
+               .start  = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
+               .end    = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
+               .flags  = IORESOURCE_DMA,
+       },
+       /* RX event */
+       {
+               .start  = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
+               .end    = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
+               .flags  = IORESOURCE_DMA,
+       },
+};
+
+static struct platform_device da850_mcasp_device = {
+       .name           = "davinci-mcasp",
+       .id             = 0,
+       .num_resources  = ARRAY_SIZE(da850_mcasp_resources),
+       .resource       = da850_mcasp_resources,
+};
+
 int __init da8xx_register_emac(void)
 {
        return platform_device_register(&da8xx_emac_device);
@@ -316,8 +344,12 @@ int __init da8xx_register_emac(void)
 
 void __init da8xx_init_mcasp(int id, struct snd_platform_data *pdata)
 {
-       if (id == 1) { /* DA830/OMAP-L137 has 3 instances of McASP */
+       /* DA830/OMAP-L137 has 3 instances of McASP */
+       if (cpu_is_davinci_da830() && id == 1) {
                da830_mcasp1_device.dev.platform_data = pdata;
                platform_device_register(&da830_mcasp1_device);
+       } else if (cpu_is_davinci_da850()) {
+               da850_mcasp_device.dev.platform_data = pdata;
+               platform_device_register(&da850_mcasp_device);
        }
 }
index f3c97ac..18e4ce3 100644 (file)
@@ -15,6 +15,9 @@
 #define        DAVINCI_DM646X_MCASP0_REG_BASE          0x01D01000
 #define DAVINCI_DM646X_MCASP1_REG_BASE         0x01D01800
 
+/* Bases of da850/da830 McASP0  register banks */
+#define DAVINCI_DA8XX_MCASP0_REG_BASE  0x01D00000
+
 /* Bases of da830 McASP1 register banks */
 #define DAVINCI_DA830_MCASP1_REG_BASE  0x01D04000
 
 #define        DAVINCI_DM646X_DMA_MCASP0_AREVT0        9
 #define        DAVINCI_DM646X_DMA_MCASP1_AXEVT1        12
 
+/* EDMA channels of da850/da830 McASP0 */
+#define        DAVINCI_DA8XX_DMA_MCASP0_AREVT  0
+#define        DAVINCI_DA8XX_DMA_MCASP0_AXEVT  1
+
 /* EDMA channels of da830 McASP1 */
 #define        DAVINCI_DA830_DMA_MCASP1_AREVT  2
 #define        DAVINCI_DA830_DMA_MCASP1_AXEVT  3
index 8676680..82d7514 100644 (file)
@@ -750,6 +750,31 @@ enum davinci_da850_index {
        DA850_MII_RXD_0,
        DA850_MDIO_CLK,
        DA850_MDIO_D,
+
+       /* McASP function */
+       DA850_ACLKR,
+       DA850_ACLKX,
+       DA850_AFSR,
+       DA850_AFSX,
+       DA850_AHCLKR,
+       DA850_AHCLKX,
+       DA850_AMUTE,
+       DA850_AXR_15,
+       DA850_AXR_14,
+       DA850_AXR_13,
+       DA850_AXR_12,
+       DA850_AXR_11,
+       DA850_AXR_10,
+       DA850_AXR_9,
+       DA850_AXR_8,
+       DA850_AXR_7,
+       DA850_AXR_6,
+       DA850_AXR_5,
+       DA850_AXR_4,
+       DA850_AXR_3,
+       DA850_AXR_2,
+       DA850_AXR_1,
+       DA850_AXR_0,
 };
 
 #ifdef CONFIG_DAVINCI_MUX