ARM: S5PV210: Fix wrong EPLL rate getting on setup clocks
authorSeungwhan Youn <sw.youn@samsung.com>
Thu, 14 Oct 2010 01:39:15 +0000 (10:39 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Mon, 25 Oct 2010 07:06:00 +0000 (16:06 +0900)
This patch fix wrong EPLL getting on setup clocks on S5PV210.

Signed-off-by: Seungwhan Youn <sw.youn@samsung.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/mach-s5pv210/clock.c
arch/arm/mach-s5pv210/include/mach/regs-clock.h

index b9c9f3b..00a7217 100644 (file)
@@ -1082,7 +1082,8 @@ void __init_or_cpufreq s5pv210_setup_clocks(void)
 
        apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4508);
        mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502);
-       epll = s5p_get_pll45xx(xtal, __raw_readl(S5P_EPLL_CON), pll_4500);
+       epll = s5p_get_pll46xx(xtal, __raw_readl(S5P_EPLL_CON),
+                               __raw_readl(S5P_EPLL_CON1), pll_4600);
        vpllsrc = clk_get_rate(&clk_vpllsrc.clk);
        vpll = s5p_get_pll45xx(vpllsrc, __raw_readl(S5P_VPLL_CON), pll_4502);
 
index 61b55c8..ebaabe0 100644 (file)
@@ -25,6 +25,7 @@
 #define S5P_APLL_CON           S5P_CLKREG(0x100)
 #define S5P_MPLL_CON           S5P_CLKREG(0x108)
 #define S5P_EPLL_CON           S5P_CLKREG(0x110)
+#define S5P_EPLL_CON1          S5P_CLKREG(0x114)
 #define S5P_VPLL_CON           S5P_CLKREG(0x120)
 
 #define S5P_CLK_SRC0           S5P_CLKREG(0x200)