OMAP3 PM: Defining .pwrsts_logic_ret field for core power domain structure
authorThara Gopinath <thara@ti.com>
Wed, 24 Feb 2010 19:05:50 +0000 (12:05 -0700)
committerPaul Walmsley <paul@pwsan.com>
Wed, 24 Feb 2010 19:05:50 +0000 (12:05 -0700)
This patch adds the flag .pwrsts_logic_ret info for the core power domain
in the associated powerdomain structure. This flag specifies the states
core domain logic can hit in event of the domain entering retention.

Signed-off-by: Thara Gopinath <thara@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
arch/arm/mach-omap2/powerdomains34xx.h

index 186c013..bd87112 100644 (file)
@@ -82,6 +82,7 @@ static struct powerdomain core_3xxx_pre_es3_1_pwrdm = {
                                           CHIP_IS_OMAP3430ES2 |
                                           CHIP_IS_OMAP3430ES3_0),
        .pwrsts           = PWRSTS_OFF_RET_ON,
+       .pwrsts_logic_ret = PWRSTS_OFF_RET,
        .banks            = 2,
        .pwrsts_mem_ret   = {
                [0] = PWRSTS_OFF_RET,    /* MEM1RETSTATE */
@@ -98,6 +99,7 @@ static struct powerdomain core_3xxx_es3_1_pwrdm = {
        .prcm_offs        = CORE_MOD,
        .omap_chip        = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES3_1),
        .pwrsts           = PWRSTS_OFF_RET_ON,
+       .pwrsts_logic_ret = PWRSTS_OFF_RET,
        .flags            = PWRDM_HAS_HDWR_SAR, /* for USBTLL only */
        .banks            = 2,
        .pwrsts_mem_ret   = {