MIPS: VR41xx: Mark GPIO lines used for IRQ

When an IRQ is started on a GPIO line, mark this GPIO as IRQ in
the gpiolib so we can keep track of the usage centrally.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: linux-gpio@vger.kernel.org
Cc: Alexandre Courbot <acourbot@nvidia.com>
Patchwork: https://patchwork.linux-mips.org/patch/6417/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/drivers/gpio/gpio-vr41xx.c b/drivers/gpio/gpio-vr41xx.c
index 9902732..66cbcc1 100644 (file)
--- a/drivers/gpio/gpio-vr41xx.c
+++ b/drivers/gpio/gpio-vr41xx.c
@@ -81,6 +81,7 @@ static DEFINE_SPINLOCK(giu_lock);
 static unsigned long giu_flags;
 
 static void __iomem *giu_base;
+static struct gpio_chip vr41xx_gpio_chip;
 
 #define giu_read(offset)               readw(giu_base + (offset))
 #define giu_write(offset, value)       writew((value), giu_base + (offset))
@@ -135,12 +136,31 @@ static void unmask_giuint_low(struct irq_data *d)
        giu_set(GIUINTENL, 1 << GPIO_PIN_OF_IRQ(d->irq));
 }
 
+static unsigned int startup_giuint(struct irq_data *data)
+{
+       if (gpio_lock_as_irq(&vr41xx_gpio_chip, data->hwirq))
+               dev_err(vr41xx_gpio_chip.dev,
+                       "unable to lock HW IRQ %lu for IRQ\n",
+                       data->hwirq);
+       /* Satisfy the .enable semantics by unmasking the line */
+       unmask_giuint_low(data);
+       return 0;
+}
+
+static void shutdown_giuint(struct irq_data *data)
+{
+       mask_giuint_low(data);
+       gpio_unlock_as_irq(&vr41xx_gpio_chip, data->hwirq);
+}
+
 static struct irq_chip giuint_low_irq_chip = {
        .name           = "GIUINTL",
        .irq_ack        = ack_giuint_low,
        .irq_mask       = mask_giuint_low,
        .irq_mask_ack   = mask_ack_giuint_low,
        .irq_unmask     = unmask_giuint_low,
+       .irq_startup    = startup_giuint,
+       .irq_shutdown   = shutdown_giuint,
 };
 
 static void ack_giuint_high(struct irq_data *d)