rockchip: rk3568-generic: Enable eMMC HS200 mode
authorJonas Karlman <jonas@kwiboo.se>
Wed, 31 Jan 2024 22:07:14 +0000 (22:07 +0000)
committerKever Yang <kever.yang@rock-chips.com>
Mon, 5 Feb 2024 07:06:04 +0000 (15:06 +0800)
Writing to eMMC using HS200 mode work more reliably then other modes on
RK356x boards.

Add device tree props and enable Kconfig options for eMMC HS200 mode on
the generic RK3566/RK3568 board. Also enable the pinctrl driver in SPL
and add missing rk3568-generic.dtb to Makefile.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
arch/arm/dts/Makefile
arch/arm/dts/rk3568-generic.dts
configs/generic-rk3568_defconfig

index 50f35e3..0fcae77 100644 (file)
@@ -181,6 +181,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
        rk3566-soquartz-model-a.dtb \
        rk3568-bpi-r2-pro.dtb \
        rk3568-evb.dtb \
+       rk3568-generic.dtb \
        rk3568-lubancat-2.dtb \
        rk3568-nanopi-r5c.dtb \
        rk3568-nanopi-r5s.dtb \
index 1006ea5..88eb1bf 100644 (file)
        model = "Generic RK3566/RK3568";
        compatible = "rockchip,rk3568";
 
-       chosen: chosen {
+       aliases {
+               mmc0 = &sdhci;
+               mmc1 = &sdmmc;
+       };
+
+       chosen {
                stdout-path = "serial2:1500000n8";
        };
 };
@@ -18,6 +23,9 @@
 &sdhci {
        bus-width = <8>;
        cap-mmc-highspeed;
+       mmc-hs200-1_8v;
+       no-sd;
+       no-sdio;
        non-removable;
        pinctrl-names = "default";
        pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>;
@@ -28,6 +36,8 @@
        bus-width = <4>;
        cap-sd-highspeed;
        disable-wp;
+       no-mmc;
+       no-sdio;
        pinctrl-names = "default";
        pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd>;
        status = "okay";
index 8f0a9c8..18a62b0 100644 (file)
@@ -42,7 +42,7 @@ CONFIG_CMD_MMC=y
 # CONFIG_SPL_DOS_PARTITION is not set
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SPL_SYSCON=y
@@ -51,11 +51,14 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_MISC=y
 # CONFIG_ROCKCHIP_IODOMAIN is not set
 CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_HS200_SUPPORT=y
+CONFIG_SPL_MMC_HS200_SUPPORT=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SPL_PINCTRL=y
 CONFIG_SPL_RAM=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_SHIFT=2