DPLL5 programming should be taken care of by the clock framework.
The driver should not need to worry about programming this
explicitly.
Also, the DPLL5 m and n values used were valid only for a
specific value of the system clock. So they would not work
correctly for other input frequencies anyway.
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>