MIPS: ath79: Change number of available IRQs

The status register of the miscellaneous interrupt controller is 32 bits
wide, but the actual value of NR_IRQS covers only 8 of them. Change
NR_IRQS in order to make all of those interrupt lines usable.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2441/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/include/asm/mach-ath79/irq.h b/arch/mips/include/asm/mach-ath79/irq.h
index 189bc6e..cffbeab 100644 (file)
--- a/arch/mips/include/asm/mach-ath79/irq.h
+++ b/arch/mips/include/asm/mach-ath79/irq.h
@@ -10,10 +10,10 @@
 #define __ASM_MACH_ATH79_IRQ_H
 
 #define MIPS_CPU_IRQ_BASE      0
-#define NR_IRQS                        16
+#define NR_IRQS                        40
 
 #define ATH79_MISC_IRQ_BASE    8
-#define ATH79_MISC_IRQ_COUNT   8
+#define ATH79_MISC_IRQ_COUNT   32
 
 #define ATH79_CPU_IRQ_IP2      (MIPS_CPU_IRQ_BASE + 2)
 #define ATH79_CPU_IRQ_USB      (MIPS_CPU_IRQ_BASE + 3)