arm: dts: rockchip: Use sdmmc node from dts/upstream on RK3528
authorJonas Karlman <jonas@kwiboo.se>
Wed, 30 Jul 2025 23:52:43 +0000 (23:52 +0000)
committerKever Yang <kever.yang@rock-chips.com>
Sat, 30 Aug 2025 15:26:08 +0000 (23:26 +0800)
Drop the sdmmc node from soc u-boot.dtsi and instead use the sdmmc node
from rk3528.dtsi with v6.16-dts now merged to dts/upstream.

This cleanup has no intended functional change.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
arch/arm/dts/rk3528-generic-u-boot.dtsi
arch/arm/dts/rk3528-generic.dts
arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi
arch/arm/dts/rk3528-u-boot.dtsi

index cc830b5..9e1fb2a 100644 (file)
@@ -1,12 +1,3 @@
 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 
 #include "rk3528-u-boot.dtsi"
-
-&sdmmc {
-       bus-width = <4>;
-       cap-sd-highspeed;
-       disable-wp;
-       no-mmc;
-       no-sdio;
-       status = "okay";
-};
index fe9e72c..637ca03 100644 (file)
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
- * Minimal generic DT for RK3528 with eMMC enabled
+ * Minimal generic DT for RK3528 with eMMC and SD-card enabled
  */
 
 /dts-v1/;
@@ -12,6 +12,7 @@
 
        aliases {
                mmc0 = &sdhci;
+               mmc1 = &sdmmc;
                serial0 = &uart0;
        };
 
        status = "okay";
 };
 
+&sdmmc {
+       bus-width = <4>;
+       cap-sd-highspeed;
+       disable-wp;
+       no-mmc;
+       no-sdio;
+       status = "okay";
+};
+
 &uart0 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart0m0_xfer>;
index 1372d8f..05a58c1 100644 (file)
@@ -5,12 +5,3 @@
 &sdhci {
        mmc-hs200-1_8v;
 };
-
-&sdmmc {
-       bus-width = <4>;
-       cap-mmc-highspeed;
-       cap-sd-highspeed;
-       disable-wp;
-       vmmc-supply = <&vcc_3v3>;
-       status = "okay";
-};
index eb6a55c..a18d33b 100644 (file)
                        compatible = "rockchip,rk3528-otp";
                        reg = <0x0 0xffce0000 0x0 0x4000>;
                };
-
-               sdmmc: mmc@ffc30000 {
-                       compatible = "rockchip,rk3528-dw-mshc",
-                                    "rockchip,rk3288-dw-mshc";
-                       reg = <0x0 0xffc30000 0x0 0x4000>;
-                       clocks = <&cru HCLK_SDMMC0>, <&cru CCLK_SRC_SDMMC0>;
-                       clock-names = "biu", "ciu";
-                       fifo-depth = <0x100>;
-                       interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
-                       max-frequency = <150000000>;
-                       pinctrl-names = "default";
-                       pinctrl-0 = <&sdmmc_bus4>, <&sdmmc_clk>, <&sdmmc_cmd>,
-                                   <&sdmmc_det>;
-                       resets = <&cru SRST_H_SDMMC0>;
-                       reset-names = "reset";
-                       rockchip,default-sample-phase = <90>;
-                       status = "disabled";
-               };
        };
 };