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x86/pci/intel_mid_pci: Propagate actual return code
author
Andy Shevchenko
<andriy.shevchenko@linux.intel.com>
Wed, 29 Jul 2015 09:16:48 +0000
(12:16 +0300)
committer
Thomas Gleixner
<tglx@linutronix.de>
Wed, 29 Jul 2015 19:23:50 +0000
(21:23 +0200)
mp_map_gsi_to_irq() returns different codes if it fails.
intel_mid_pci_irq_enable() hides this under -EBUSY.
Return the actual failure code.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Link:
http://lkml.kernel.org/r/1438161409-4671-3-git-send-email-andriy.shevchenko@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
arch/x86/pci/intel_mid_pci.c
patch
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diff --git
a/arch/x86/pci/intel_mid_pci.c
b/arch/x86/pci/intel_mid_pci.c
index
7553921
..
3361f0a
100644
(file)
--- a/
arch/x86/pci/intel_mid_pci.c
+++ b/
arch/x86/pci/intel_mid_pci.c
@@
-213,6
+213,7
@@
static int intel_mid_pci_irq_enable(struct pci_dev *dev)
{
struct irq_alloc_info info;
int polarity;
+ int ret;
if (dev->irq_managed && dev->irq > 0)
return 0;
@@
-244,8
+245,9
@@
static int intel_mid_pci_irq_enable(struct pci_dev *dev)
* MRST only have IOAPIC, the PCI irq lines are 1:1 mapped to
* IOAPIC RTE entries, so we just enable RTE for the device.
*/
- if (mp_map_gsi_to_irq(dev->irq, IOAPIC_MAP_ALLOC, &info) < 0)
- return -EBUSY;
+ ret = mp_map_gsi_to_irq(dev->irq, IOAPIC_MAP_ALLOC, &info);
+ if (ret < 0)
+ return ret;
dev->irq_managed = 1;