clk: sunxi: Add Allwinner A20 gates

The Allwinner A20 is almost identical to the earlier A10 SoC from
Allwinner on many aspects, including the clocks tree. However, since the
A20 has some additionnal IPs compared to the A10, the clock tree isn't
exactly the same, especially when it comes to the gated clocks
available. We thus need to register different clock gates for the A20.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Emilio López <emilio@elopez.com.ar>

diff --cc Documentation/devicetree/bindings/clock/sunxi.txt
Simple merge

diff --cc Documentation/devicetree/bindings/clock/sunxi/sun7i-a20-gates.txt
Simple merge

diff --cc drivers/clk/sunxi/clk-sunxi.c
Simple merge