ARM: omap2+: set IRQCHIP_SKIP_SET_WAKE for INTC interrupts.

Without an ->irq_set_wake() method in an irq_chip, calls to
enable_irq_wake() will fail.  This also causes these interrupts to not
be able to abort suspend (via check_wakeup_irqs() in late suspend.)

Currently, we don't implement ->irq_set_wake() for INTC interrupts
because they default to be wakeup enabled by setting the GRPSEL bits
in PM init.  Even though there is no ->irq_set_wake(), we want
enable_irq_wake() to succeed so these interrupts can abort suspend
when necessary.

To fix, set IRQCHIP_SKIP_SET_WAKE flag for all the INTC
interrupts which avoids trying to check irq_chip->irq_set_wake()
and failing when it doesn't exist.

Longer term, we need to implement ->irq_set_wake() for the INTC
which can manage the appropriate GRPSEL bits.

Signed-off-by: NeilBrown <neilb@suse.de>
[khilman@ti.com: rework changelog]
Signed-off-by: Kevin Hilman <khilman@ti.com>

diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 65f1be6..9fbeb2c 100644 (file)
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -133,6 +133,7 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
        ct->chip.irq_ack = omap_mask_ack_irq;
        ct->chip.irq_mask = irq_gc_mask_disable_reg;
        ct->chip.irq_unmask = irq_gc_unmask_enable_reg;
+       ct->chip.flags |= IRQCHIP_SKIP_SET_WAKE;
 
        ct->regs.ack = INTC_CONTROL;
        ct->regs.enable = INTC_MIR_CLEAR0;