arm64: zynqmp: Fix DTOVL warning about graphs in kv/kr260
authorMichal Simek <michal.simek@amd.com>
Mon, 22 Sep 2025 08:28:15 +0000 (10:28 +0200)
committerMichal Simek <michal.simek@amd.com>
Thu, 9 Oct 2025 07:07:04 +0000 (09:07 +0200)
DTC is generating warnings about missing port like:
DTOVL   arch/arm/dts/zynqmp-smk-k24-revA-sck-kv-g-revB.dtb
 arch/arm/dts/zynqmp-sck-kv-g-revA.dtbo: Warning (graph_port):
 /fragment@5/__overlay__: graph port node name should be 'port'
...

That's why change description and add it directly to dpsub mode to contain
full description with also port.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/576630cc9696e21bef15bd1f0ca35e396adc4eca.1758529693.git.michal.simek@amd.com
arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
arch/arm/dts/zynqmp-sck-kv-g-revB.dtso

index b92dcb8..88396d0 100644 (file)
        phy-names = "dp-phy0";
        phys = <&psgtr 1 PHY_TYPE_DP 0 1>;
        assigned-clock-rates = <27000000>, <25000000>, <300000000>;
-};
 
-&out_dp {
-       dpsub_dp_out: endpoint {
-               remote-endpoint = <&dpcon_in>;
+       ports {
+               out_dp: port@5 {
+                       dpsub_dp_out: endpoint {
+                               remote-endpoint = <&dpcon_in>;
+                       };
+               };
        };
 };
 
index 99ad220..e041a96 100644 (file)
        phy-names = "dp-phy0";
        phys = <&psgtr 1 PHY_TYPE_DP 0 1>;
        assigned-clock-rates = <27000000>, <25000000>, <300000000>;
-};
 
-&out_dp {
-       dpsub_dp_out: endpoint {
-               remote-endpoint = <&dpcon_in>;
+       ports {
+               out_dp: port@5 {
+                       dpsub_dp_out: endpoint {
+                               remote-endpoint = <&dpcon_in>;
+                       };
+               };
        };
 };
 
index d7351a1..fbbebbe 100644 (file)
@@ -3,7 +3,7 @@
  * dts file for KV260 revA Carrier Card
  *
  * (C) Copyright 2020 - 2022, Xilinx, Inc.
- * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
+ * (C) Copyright 2022 - 2025, Advanced Micro Devices, Inc.
  *
  * SD level shifter:
  * "A" - A01 board un-modified (NXP)
        phy-names = "dp-phy0", "dp-phy1";
        phys = <&psgtr 1 PHY_TYPE_DP 0 0>, <&psgtr 0 PHY_TYPE_DP 1 0>;
        assigned-clock-rates = <27000000>, <25000000>, <300000000>;
-};
 
-&out_dp {
-       dpsub_dp_out: endpoint {
-               remote-endpoint = <&dpcon_in>;
+       ports {
+               out_dp: port@5 {
+                       dpsub_dp_out: endpoint {
+                               remote-endpoint = <&dpcon_in>;
+                       };
+               };
        };
 };
 
index a4ae37e..87f94f8 100644 (file)
@@ -3,7 +3,7 @@
  * dts file for KV260 revA Carrier Card
  *
  * (C) Copyright 2020 - 2022, Xilinx, Inc.
- * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
+ * (C) Copyright 2022 - 2025, Advanced Micro Devices, Inc.
  *
  * Michal Simek <michal.simek@amd.com>
  */
        phy-names = "dp-phy0", "dp-phy1";
        phys = <&psgtr 1 PHY_TYPE_DP 0 0>, <&psgtr 0 PHY_TYPE_DP 1 0>;
        assigned-clock-rates = <27000000>, <25000000>, <300000000>;
-};
 
-&out_dp {
-       dpsub_dp_out: endpoint {
-               remote-endpoint = <&dpcon_in>;
+       ports {
+               out_dp: port@5 {
+                       dpsub_dp_out: endpoint {
+                               remote-endpoint = <&dpcon_in>;
+                       };
+               };
        };
 };