Add EV-iMX280-NANO-X-MB board
authorOleh Kravchenko <oleg@kaa.org.ua>
Fri, 14 May 2021 21:18:33 +0000 (00:18 +0300)
committerStefano Babic <sbabic@denx.de>
Wed, 9 Jun 2021 11:32:49 +0000 (13:32 +0200)
A simple prototyping board with one microSD port, one Ethernet port,
2 USB ports, I2C, SPI, GPIO, and UART interfaces.

Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua>
Cc: Stefano Babic <sbabic@denx.de>
MAINTAINERS
arch/arm/dts/Makefile
arch/arm/dts/ev-imx280-nano-x-mb.dts [new file with mode: 0644]
board/out4/o4-imx6ull-nano/Kconfig
board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c
configs/ev-imx280-nano-x-mb_defconfig [new file with mode: 0644]

index 875eb5d..2accd1f 100644 (file)
@@ -923,9 +923,11 @@ OUT4-IMX6ULL-NANO BOARD
 M:     Oleh Kravchenko <oleg@kaa.org.ua>
 S:     Maintained
 T:     git https://github.com/Oleh-Kravchenko/u-boot-out4.git
+F:     arch/arm/dts/ev-imx280-nano-x-mb.dts
 F:     arch/arm/dts/o4-imx-nano.dts
 F:     arch/arm/dts/o4-imx6ull-nano.dtsi
 F:     board/out4
+F:     configs/ev-imx280-nano-x-mb_defconfig
 F:     configs/o4-imx6ull-nano_defconfig
 F:     include/configs/o4-imx6ull-nano.h
 
index b944778..d29844e 100644 (file)
@@ -822,6 +822,9 @@ dtb-$(CONFIG_ARCH_MX6) += \
 dtb-$(CONFIG_O4_IMX_NANO) += \
        o4-imx-nano.dtb
 
+dtb-$(CONFIG_EV_IMX280_NANO_X_MB) += \
+       ev-imx280-nano-x-mb.dtb
+
 dtb-$(CONFIG_MX7) += imx7d-sdb.dtb \
        imx7d-sdb-qspi.dtb \
        imx7-cm.dtb \
diff --git a/arch/arm/dts/ev-imx280-nano-x-mb.dts b/arch/arm/dts/ev-imx280-nano-x-mb.dts
new file mode 100644 (file)
index 0000000..7aec076
--- /dev/null
@@ -0,0 +1,109 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (C) 2021 Oleh Kravchenko <oleg@kaa.org.ua>
+
+/dts-v1/;
+
+#include "o4-imx6ull-nano.dtsi"
+
+/ {
+       model = "EV-iMX280-NANO-X-MB";
+       compatible = "evodbg,ev-imx280-nano-x-mb",
+                    "out4,o4-imx6ull-nano",
+                    "fsl,imx6ull";
+
+       aliases {
+               mmc1 = &usdhc1;
+       };
+
+       chosen {
+               stdout-path = &uart1;
+       };
+};
+
+&iomuxc {
+       pinctrl_uart1: uart1grp {
+               fsl,pins = <
+                       MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX   0x1b0b1
+                       MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX   0x1b0b1
+               >;
+       };
+
+       pinctrl_usdhc1: usdhc1grp {
+               fsl,pins = <
+                       MX6UL_PAD_SD1_CLK__USDHC1_CLK           0x10069
+                       MX6UL_PAD_SD1_CMD__USDHC1_CMD           0x17059
+                       MX6UL_PAD_SD1_DATA0__USDHC1_DATA0       0x17059
+                       MX6UL_PAD_SD1_DATA1__USDHC1_DATA1       0x17059
+                       MX6UL_PAD_SD1_DATA2__USDHC1_DATA2       0x17059
+                       MX6UL_PAD_SD1_DATA3__USDHC1_DATA3       0x17059
+                       MX6UL_PAD_UART1_RTS_B__USDHC1_CD_B      0x03029
+               >;
+       };
+
+       pinctrl_mdio: mdiogrp {
+               fsl,pins = <
+                       MX6UL_PAD_GPIO1_IO06__ENET1_MDIO        0x1b0b0
+                       MX6UL_PAD_GPIO1_IO07__ENET1_MDC         0x1b0b0
+                       MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01      0xb0b0 /* RST */
+               >;
+       };
+
+       pinctrl_usb_otg1_id: usbotg1idgrp {
+               fsl,pins = <
+                       MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID    0x17059
+               >;
+       };
+};
+
+&uart1 {
+       pinctrl-0 = <&pinctrl_uart1>;
+       pinctrl-names = "default";
+       status = "okay";
+};
+
+&usdhc1 {
+       bus-width = <4>;
+       no-1-8-v;
+       pinctrl-0 = <&pinctrl_usdhc1>;
+       pinctrl-names = "default";
+       status = "okay";
+       wakeup-source;
+};
+
+&fec1 {
+       phy-handle = <&phy0>;
+       phy-mode = "rmii";
+       phy-reset-duration = <250>;
+       phy-reset-post-delay = <100>;
+       phy-reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&pinctrl_fec1 &pinctrl_mdio>;
+       pinctrl-names = "default";
+       status = "okay";
+
+       mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               phy0: ethernet-phy@0 {
+                       clocks = <&clks IMX6UL_CLK_ENET_REF>;
+                       clock-names = "rmii-ref";
+                       interrupt-parent = <&gpio5>;
+                       interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
+                       pinctrl-0 = <&pinctrl_phy0_irq>;
+                       pinctrl-names = "default";
+                       reg = <0>;
+               };
+       };
+};
+
+&usbotg1 {
+       dr_mode = "otg";
+       pinctrl-0 = <&pinctrl_usb_otg1_id>;
+       pinctrl-names = "default";
+       status = "okay";
+};
+
+&usbotg2 {
+       dr_mode = "host";
+       status = "okay";
+};
index c2497d5..e2ab80b 100644 (file)
@@ -45,6 +45,12 @@ config O4_IMX_NANO
            A baseboard for EV-iMX280-NANO module:
            https://out4.ru/products/board/18-o4-imx-nano.html
 
+config EV_IMX280_NANO_X_MB
+       bool "EV-IMX280-NANO-X-MB"
+       help
+           A simple baseboard for EV-iMX280-NANO module:
+           http://evodbg.net/products/mx28-eval-kits/14-ev-imx280-nano-x-mb.html
+
 endchoice
 
 config IMX_CONFIG
@@ -53,5 +59,6 @@ config IMX_CONFIG
 
 config DEFAULT_DEVICE_TREE
        default "o4-imx-nano" if O4_IMX_NANO
+       default "ev-imx280-nano-x-mb" if EV_IMX280_NANO_X_MB
 
 endif
index fec1755..edb200e 100644 (file)
@@ -39,16 +39,18 @@ static int setup_fec_clock(void)
                if (ret)
                        return ret;
 
-               /*
-                * Use 50M anatop loopback REF_CLK2 for ENET2,
-                * clear gpr1[14], set gpr1[18].
-                */
-               clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK,
-                               IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK);
-
-               ret = enable_fec_anatop_clock(1, ENET_50MHZ);
-               if (ret)
-                       return ret;
+               if (!IS_ENABLED(CONFIG_EV_IMX280_NANO_X_MB)) {
+                       /*
+                        * Use 50M anatop loopback REF_CLK2 for ENET2,
+                        * clear gpr1[14], set gpr1[18].
+                        */
+                       clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK,
+                                       IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK);
+
+                       ret = enable_fec_anatop_clock(1, ENET_50MHZ);
+                       if (ret)
+                               return ret;
+               }
 
                enable_enet_clk(1);
        }
diff --git a/configs/ev-imx280-nano-x-mb_defconfig b/configs/ev-imx280-nano-x-mb_defconfig
new file mode 100644 (file)
index 0000000..b06aede
--- /dev/null
@@ -0,0 +1,91 @@
+CONFIG_ARCH_MX6=y
+CONFIG_ARM=y
+CONFIG_DEFAULT_DEVICE_TREE="ev-imx280-nano-x-mb"
+CONFIG_EV_IMX280_NANO_X_MB=y
+CONFIG_HUSH_PARSER=y
+CONFIG_IMX_MODULE_FUSE=y
+CONFIG_MX6ULL=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX6=y
+CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TARGET_O4_IMX6ULL_NANO=y
+
+CONFIG_K4B4G1646D_BCMA=y
+# CONFIG_MT41K256M16HA_125E is not set
+
+# Device Tree
+CONFIG_OF_CONTROL=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+
+# Environment
+CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
+CONFIG_ENV_IS_IN_FAT=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+
+# Clock driver for imx6ull is not implemented
+# CONFIG_CLK_IMX6Q=y
+
+# Thermal
+CONFIG_DM_THERMAL=y
+CONFIG_IMX_THERMAL=y
+
+# Serial
+CONFIG_DM_SERIAL=y
+CONFIG_MXC_UART=y
+
+# eMMC support
+CONFIG_CMD_MMC=y
+CONFIG_DM_MMC=y
+CONFIG_FSL_USDHC=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+
+# GPIO support
+CONFIG_CMD_GPIO=y
+CONFIG_DM_GPIO=y
+CONFIG_MXC_GPIO=y
+
+# USB support
+CONFIG_CI_UDC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_DM_USB=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+
+# Fastboot support
+CONFIG_CMD_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x82000000
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_USB_FUNCTION_FASTBOOT=y
+
+# Ethernet support
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MDIO=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_DM_ETH=y
+CONFIG_FEC_MXC=y
+CONFIG_MII=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_SMSC=y
+
+# Watchdog support is broken
+# CONFIG_CMD_WDT=y
+# CONFIG_IMX_WATCHDOG=y
+# CONFIG_SYSRESET_WATCHDOG=y
+# CONFIG_WATCHDOG_RESET_DISABLE=y
+# CONFIG_WDT=y
+
+# misc
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_PART=y