[PATCH] ARM: 2784/1: Fix the block cache flush operation range

Patch from Catalin Marinas

The range for the ARMv6 block cache operations is inclusive but the
kernel doesn't re-calculate the end address, causing a page fault when
used (this only happens with support for cache aliasing, otherwise the
blk_flush_kern_dcache_page() is not called). This patch subtracts
L1_CACHE_BYTES from the end address.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/mm/blockops.c b/arch/arm/mm/blockops.c
index 806c6ee..4f5ee2d 100644 (file)
--- a/arch/arm/mm/blockops.c
+++ b/arch/arm/mm/blockops.c
@@ -25,13 +25,14 @@ blk_flush_kern_dcache_page(void *kaddr)
 {
        asm(
        "add    r1, r0, %0                                                      \n\
+       sub     r1, r1, %1                                                      \n\
 1:     .word   0xec401f0e      @ mcrr  p15, 0, r0, r1, c14, 0  @ blocking      \n\
        mov     r0, #0                                                          \n\
        mcr     p15, 0, r0, c7, c5, 0                                           \n\
        mcr     p15, 0, r0, c7, c10, 4                                          \n\
        mov     pc, lr"
        :
-       : "I" (PAGE_SIZE));
+       : "I" (PAGE_SIZE), "I" (L1_CACHE_BYTES));
 }
 
 /*