ARM: tegra: Fix AHB base address on Tegra20, Tegra30 and Tegra114
authorNicolas Chauvet <kwizart@gmail.com>
Sat, 8 Aug 2015 13:58:12 +0000 (15:58 +0200)
committerThierry Reding <treding@nvidia.com>
Fri, 21 Aug 2015 16:44:28 +0000 (18:44 +0200)
Current base address is wrong by 0x04 bytes for AHB bus device as shown
in dmesg:

tegra-ahb 6000c004.ahb: incorrect AHB base address in DT data - enabling workaround

To correct old DTBs, commit ce7a10b0ff3d ("ARM: 8334/1: amba: tegra-ahb:
detect and correct bogus base address") checks for the low bit of the
base address and removes theses 0x04 bytes at runtime.

This patch fixes the original DTS, so upstream version doesn't need the
workaround of the base address.

As both addresses are valid, this patch doesn't break compatibility.

Tested on tegra20-paz00 (aka ac100).

Signed-off-by: Nicolas Chauvet <kwizart@gmail.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm/boot/dts/tegra114.dtsi
arch/arm/boot/dts/tegra20.dtsi
arch/arm/boot/dts/tegra30.dtsi

index f58a3d9..4bdf8f9 100644 (file)
                #dma-cells = <1>;
        };
 
-       ahb: ahb@6000c004 {
+       ahb: ahb@6000c000 {
                compatible = "nvidia,tegra114-ahb", "nvidia,tegra30-ahb";
-               reg = <0x6000c004 0x14c>;
+               reg = <0x6000c000 0x150>;
        };
 
        gpio: gpio@6000d000 {
index f444b67..f6f1461 100644 (file)
                #dma-cells = <1>;
        };
 
-       ahb@6000c004 {
+       ahb@6000c000 {
                compatible = "nvidia,tegra20-ahb";
-               reg = <0x6000c004 0x10c>; /* AHB Arbitration + Gizmo Controller */
+               reg = <0x6000c000 0x110>; /* AHB Arbitration + Gizmo Controller */
        };
 
        gpio: gpio@6000d000 {
index 782b11b..559763e 100644 (file)
                #dma-cells = <1>;
        };
 
-       ahb: ahb@6000c004 {
+       ahb: ahb@6000c000 {
                compatible = "nvidia,tegra30-ahb";
-               reg = <0x6000c004 0x14c>; /* AHB Arbitration + Gizmo Controller */
+               reg = <0x6000c000 0x150>; /* AHB Arbitration + Gizmo Controller */
        };
 
        gpio: gpio@6000d000 {