[ARM] 4730/1: S3C2412: Ensure the PWRCFG has the right mode for RTC wake
authorBen Dooks <ben-linux@fluff.org>
Sun, 23 Dec 2007 02:09:33 +0000 (03:09 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Mon, 28 Jan 2008 13:20:50 +0000 (13:20 +0000)
Ensure that if the RTC IRQ is not selected for wake in the
base configuration, then the PWRCFG has the same value set
in it.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-s3c2412/irq.c
arch/arm/plat-s3c24xx/irq.c
include/asm-arm/plat-s3c24xx/irq.h

index e9d0c76..cc1917b 100644 (file)
@@ -33,6 +33,7 @@
 
 #include <asm/arch/regs-irq.h>
 #include <asm/arch/regs-gpio.h>
+#include <asm/arch/regs-power.h>
 
 #include <asm/plat-s3c24xx/cpu.h>
 #include <asm/plat-s3c24xx/irq.h>
@@ -153,6 +154,22 @@ static struct irq_chip s3c2412_irq_cfsdi = {
        .unmask         = s3c2412_irq_cfsdi_unmask,
 };
 
+static int s3c2412_irq_rtc_wake(unsigned int irqno, unsigned int state)
+{
+       unsigned long pwrcfg;
+
+       pwrcfg = __raw_readl(S3C2412_PWRCFG);
+       if (state)
+               pwrcfg &= ~S3C2412_PWRCFG_RTC_MASKIRQ;
+       else
+               pwrcfg |= S3C2412_PWRCFG_RTC_MASKIRQ;
+       __raw_writel(pwrcfg, S3C2412_PWRCFG);
+
+       return s3c_irq_chip.set_wake(irqno, state);
+}
+
+static struct irq_chip s3c2412_irq_rtc_chip;
+
 static int s3c2412_irq_add(struct sys_device *sysdev)
 {
        unsigned int irqno;
@@ -173,6 +190,13 @@ static int s3c2412_irq_add(struct sys_device *sysdev)
                set_irq_flags(irqno, IRQF_VALID);
        }
 
+       /* change RTC IRQ's set wake method */
+
+       s3c2412_irq_rtc_chip = s3c_irq_chip;
+       s3c2412_irq_rtc_chip.set_wake = s3c2412_irq_rtc_wake;
+
+       set_irq_chip(IRQ_RTC, &s3c2412_irq_rtc_chip);
+
        return 0;
 }
 
index 8fbc884..d486f51 100644 (file)
@@ -187,7 +187,7 @@ struct irq_chip s3c_irq_level_chip = {
        .set_wake       = s3c_irq_wake
 };
 
-static struct irq_chip s3c_irq_chip = {
+struct irq_chip s3c_irq_chip = {
        .name           = "s3c",
        .ack            = s3c_irq_ack,
        .mask           = s3c_irq_mask,
index 8af6d95..45746a9 100644 (file)
@@ -15,7 +15,9 @@
 
 #define EXTINT_OFF (IRQ_EINT4 - 4)
 
+/* these are exported for arch/arm/mach-* usage */
 extern struct irq_chip s3c_irq_level_chip;
+extern struct irq_chip s3c_irq_chip;
 
 static inline void
 s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit,