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arm64: zynqmp: Use reset controller framework for asserting/de-asserting reset
authorAnurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
Wed, 8 Feb 2017 11:39:10 +0000 (17:09 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Tue, 28 Nov 2017 15:09:15 +0000 (16:09 +0100)
This patch modifies the phy_zynqmp.c driver to use reset-controller
framework for asserting/de-asserting reset for High Speed modules.

Also fix documentation and dtsi.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arch/arm/dts/zynqmp.dtsi patch | blob | history

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 5d953eb..9516c79 100644 (file)
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -786,9 +786,8 @@
                        status = "disabled";
                        reg = <0x0 0xfd400000 0x0 0x40000>,
                              <0x0 0xfd3d0000 0x0 0x1000>,
-                             <0x0 0xfd1a0000 0x0 0x1000>,
                              <0x0 0xff5e0000 0x0 0x1000>;
-                       reg-names = "serdes", "siou", "fpd", "lpd";
+                       reg-names = "serdes", "siou", "lpd";
                        nvmem-cells = <&soc_revision>;
                        nvmem-cell-names = "soc_revision";
                        resets = <&rst 16>, <&rst 59>, <&rst 60>,
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