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gpio-stp-xway: Fix enabling the highest bit of the PHY LEDs
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Mon, 25 May 2015 20:39:50 +0000 (22:39 +0200)
committerLinus Walleij <linus.walleij@linaro.org>
Mon, 1 Jun 2015 14:53:55 +0000 (16:53 +0200)
0x3 only masks two bits, but three bits have to be allowed. This fixes
GPHY0 LED2 (which is the highest bit of phy2) on my board.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

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