arm64: zynqmp: Sync clock labels with kr260 revB
authorMichal Simek <michal.simek@amd.com>
Fri, 26 Jan 2024 07:24:41 +0000 (08:24 +0100)
committerMichal Simek <michal.simek@amd.com>
Mon, 12 Feb 2024 08:28:32 +0000 (09:28 +0100)
Board description describes the hard part of chip (PS) but programmable
logic (PL) part is not described in this file. But clocks on the board are
not only connected to PS but also wired to PL. And because two revisions
are available where revA is using one si5332 and revB multiple clock chips
using the same clock labels helping with keeping only one device tree
overlay which targets PL. That's why synchronize clock labels and use
labels from revB which are more generic.
Unfortunately if there is driver for si5332 chip split could happen again
but it is still worth to do it now and solve this issue when occurs.

Reported-by: Sagar Karmarkar <sagar.karmarkar@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/abac6069e6029ed4076ec7b9d6b33604b6072aa3.1706253871.git.michal.simek@amd.com
arch/arm/dts/zynqmp-sck-kr-g-revA.dtso

index 7717abf..39ca98a 100644 (file)
                io-channels = <&u14 0>, <&u14 1>, <&u14 2>;
        };
 
-       si5332_0: si5332-0 { /* u17 - GEM0/1 */
+       clk_125: si5332-0 { /* u17 - GEM0/1 */
                compatible = "fixed-clock";
                #clock-cells = <0>;
                clock-frequency = <125000000>;
        };
 
-       si5332_1: si5332-1 { /* u17 - DP */
+       clk_27: si5332-1 { /* u17 - DP */
                compatible = "fixed-clock";
                #clock-cells = <0>;
                clock-frequency = <27000000>;
        };
 
-       si5332_2: si5332-2 { /* u17 - USB */
+       clk_26: si5332-2 { /* u17 - USB */
                compatible = "fixed-clock";
                #clock-cells = <0>;
                clock-frequency = <26000000>;
        };
 
-       si5332_3: si5332-3 { /* u17 - SFP+ */
+       clk_156: si5332-3 { /* u17 - SFP+ */
                compatible = "fixed-clock";
                #clock-cells = <0>;
                clock-frequency = <156250000>;
        };
 
-       si5332_4: si5332-4 { /* u17 - GEM2 */
+       clk_25_0: si5332-4 { /* u17 - GEM2 */
                compatible = "fixed-clock";
                #clock-cells = <0>;
                clock-frequency = <25000000>;
        };
 
-       si5332_5: si5332-5 { /* u17 - GEM3 */
+       clk_25_1: si5332-5 { /* u17 - GEM3 */
                compatible = "fixed-clock";
                #clock-cells = <0>;
                clock-frequency = <25000000>;
 &psgtr {
        status = "okay";
        /* gem0/1, dp, usb */
-       clocks = <&si5332_0>, <&si5332_1>, <&si5332_2>;
+       clocks = <&clk_125>, <&clk_27>, <&clk_26>;
        clock-names = "ref0", "ref1", "ref2";
 };