powerpc/83xx: Add PCI-E support for all MPC83xx boards with PCI-E

This patch adds pcie nodes to the appropriate dts files, plus adds
some probing code for the boards.

Also, remove of_device_is_avaliable() check from the mpc837x_mds.c
board file, as mpc83xx_add_bridge() has the same check now.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index 7178416..88d691c 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -22,6 +22,8 @@
                serial0 = &serial0;
                serial1 = &serial1;
                pci0 = &pci0;
+               pci1 = &pci1;
+               pci2 = &pci2;
        };
 
        cpus {
@@ -349,4 +351,66 @@
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };
+
+       pci1: pcie@e0009000 {
+               #address-cells = <3>;
+               #size-cells = <2>;
+               #interrupt-cells = <1>;
+               device_type = "pci";
+               compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
+               reg = <0xe0009000 0x00001000>;
+               ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
+                         0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
+               bus-range = <0 255>;
+               interrupt-map-mask = <0xf800 0 0 7>;
+               interrupt-map = <0 0 0 1 &ipic 1 8
+                                0 0 0 2 &ipic 1 8
+                                0 0 0 3 &ipic 1 8
+                                0 0 0 4 &ipic 1 8>;
+               clock-frequency = <0>;
+
+               pcie@0 {
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       reg = <0 0 0 0 0>;
+                       ranges = <0x02000000 0 0xa0000000
+                                 0x02000000 0 0xa0000000
+                                 0 0x10000000
+                                 0x01000000 0 0x00000000
+                                 0x01000000 0 0x00000000
+                                 0 0x00800000>;
+               };
+       };
+
+       pci2: pcie@e000a000 {
+               #address-cells = <3>;
+               #size-cells = <2>;
+               #interrupt-cells = <1>;
+               device_type = "pci";
+               compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
+               reg = <0xe000a000 0x00001000>;
+               ranges = <0x02000000 0 0xc0000000 0xc0000000 0 0x10000000
+                         0x01000000 0 0x00000000 0xd1000000 0 0x00800000>;
+               bus-range = <0 255>;
+               interrupt-map-mask = <0xf800 0 0 7>;
+               interrupt-map = <0 0 0 1 &ipic 2 8
+                                0 0 0 2 &ipic 2 8
+                                0 0 0 3 &ipic 2 8
+                                0 0 0 4 &ipic 2 8>;
+               clock-frequency = <0>;
+
+               pcie@0 {
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       reg = <0 0 0 0 0>;
+                       ranges = <0x02000000 0 0xc0000000
+                                 0x02000000 0 0xc0000000
+                                 0 0x10000000
+                                 0x01000000 0 0x00000000
+                                 0x01000000 0 0x00000000
+                                 0 0x00800000>;
+               };
+       };
 };

diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index 1d14d70..a519e85 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -23,6 +23,8 @@
                serial0 = &serial0;
                serial1 = &serial1;
                pci0 = &pci0;
+               pci1 = &pci1;
+               pci2 = &pci2;
        };
 
        cpus {
@@ -409,4 +411,66 @@
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };
+
+       pci1: pcie@e0009000 {
+               #address-cells = <3>;
+               #size-cells = <2>;
+               #interrupt-cells = <1>;
+               device_type = "pci";
+               compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
+               reg = <0xe0009000 0x00001000>;
+               ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
+                         0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
+               bus-range = <0 255>;
+               interrupt-map-mask = <0xf800 0 0 7>;
+               interrupt-map = <0 0 0 1 &ipic 1 8
+                                0 0 0 2 &ipic 1 8
+                                0 0 0 3 &ipic 1 8
+                                0 0 0 4 &ipic 1 8>;
+               clock-frequency = <0>;
+
+               pcie@0 {
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       reg = <0 0 0 0 0>;
+                       ranges = <0x02000000 0 0xa8000000
+                                 0x02000000 0 0xa8000000
+                                 0 0x10000000
+                                 0x01000000 0 0x00000000
+                                 0x01000000 0 0x00000000
+                                 0 0x00800000>;
+               };
+       };
+
+       pci2: pcie@e000a000 {
+               #address-cells = <3>;
+               #size-cells = <2>;
+               #interrupt-cells = <1>;
+               device_type = "pci";
+               compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
+               reg = <0xe000a000 0x00001000>;
+               ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
+                         0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
+               bus-range = <0 255>;
+               interrupt-map-mask = <0xf800 0 0 7>;
+               interrupt-map = <0 0 0 1 &ipic 2 8
+                                0 0 0 2 &ipic 2 8
+                                0 0 0 3 &ipic 2 8
+                                0 0 0 4 &ipic 2 8>;
+               clock-frequency = <0>;
+
+               pcie@0 {
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       reg = <0 0 0 0 0>;
+                       ranges = <0x02000000 0 0xc8000000
+                                 0x02000000 0 0xc8000000
+                                 0 0x10000000
+                                 0x01000000 0 0x00000000
+                                 0x01000000 0 0x00000000
+                                 0 0x00800000>;
+               };
+       };
 };

diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index 9413af3..b4ab3d0 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -22,6 +22,8 @@
                serial0 = &serial0;
                serial1 = &serial1;
                pci0 = &pci0;
+               pci1 = &pci1;
+               pci2 = &pci2;
        };
 
        cpus {
@@ -350,4 +352,66 @@
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };
+
+       pci1: pcie@e0009000 {
+               #address-cells = <3>;
+               #size-cells = <2>;
+               #interrupt-cells = <1>;
+               device_type = "pci";
+               compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
+               reg = <0xe0009000 0x00001000>;
+               ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
+                         0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
+               bus-range = <0 255>;
+               interrupt-map-mask = <0xf800 0 0 7>;
+               interrupt-map = <0 0 0 1 &ipic 1 8
+                                0 0 0 2 &ipic 1 8
+                                0 0 0 3 &ipic 1 8
+                                0 0 0 4 &ipic 1 8>;
+               clock-frequency = <0>;
+
+               pcie@0 {
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       reg = <0 0 0 0 0>;
+                       ranges = <0x02000000 0 0xa8000000
+                                 0x02000000 0 0xa8000000
+                                 0 0x10000000
+                                 0x01000000 0 0x00000000
+                                 0x01000000 0 0x00000000
+                                 0 0x00800000>;
+               };
+       };
+
+       pci2: pcie@e000a000 {
+               #address-cells = <3>;
+               #size-cells = <2>;
+               #interrupt-cells = <1>;
+               device_type = "pci";
+               compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
+               reg = <0xe000a000 0x00001000>;
+               ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
+                         0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
+               bus-range = <0 255>;
+               interrupt-map-mask = <0xf800 0 0 7>;
+               interrupt-map = <0 0 0 1 &ipic 2 8
+                                0 0 0 2 &ipic 2 8
+                                0 0 0 3 &ipic 2 8
+                                0 0 0 4 &ipic 2 8>;
+               clock-frequency = <0>;
+
+               pcie@0 {
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       reg = <0 0 0 0 0>;
+                       ranges = <0x02000000 0 0xc8000000
+                                 0x02000000 0 0xc8000000
+                                 0 0x10000000
+                                 0x01000000 0 0x00000000
+                                 0x01000000 0 0x00000000
+                                 0 0x00800000>;
+               };
+       };
 };

diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index b85fc02..6bbee49 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -23,6 +23,8 @@
                serial0 = &serial0;
                serial1 = &serial1;
                pci0 = &pci0;
+               pci1 = &pci1;
+               pci2 = &pci2;
        };
 
        cpus {
@@ -395,4 +397,66 @@
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };
+
+       pci1: pcie@e0009000 {
+               #address-cells = <3>;
+               #size-cells = <2>;
+               #interrupt-cells = <1>;
+               device_type = "pci";
+               compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
+               reg = <0xe0009000 0x00001000>;
+               ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
+                         0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
+               bus-range = <0 255>;
+               interrupt-map-mask = <0xf800 0 0 7>;
+               interrupt-map = <0 0 0 1 &ipic 1 8
+                                0 0 0 2 &ipic 1 8
+                                0 0 0 3 &ipic 1 8
+                                0 0 0 4 &ipic 1 8>;
+               clock-frequency = <0>;
+
+               pcie@0 {
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       reg = <0 0 0 0 0>;
+                       ranges = <0x02000000 0 0xa8000000
+                                 0x02000000 0 0xa8000000
+                                 0 0x10000000
+                                 0x01000000 0 0x00000000
+                                 0x01000000 0 0x00000000
+                                 0 0x00800000>;
+               };
+       };
+
+       pci2: pcie@e000a000 {
+               #address-cells = <3>;
+               #size-cells = <2>;
+               #interrupt-cells = <1>;
+               device_type = "pci";
+               compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
+               reg = <0xe000a000 0x00001000>;
+               ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
+                         0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
+               bus-range = <0 255>;
+               interrupt-map-mask = <0xf800 0 0 7>;
+               interrupt-map = <0 0 0 1 &ipic 2 8
+                                0 0 0 2 &ipic 2 8
+                                0 0 0 3 &ipic 2 8
+                                0 0 0 4 &ipic 2 8>;
+               clock-frequency = <0>;
+
+               pcie@0 {
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       reg = <0 0 0 0 0>;
+                       ranges = <0x02000000 0 0xc8000000
+                                 0x02000000 0 0xc8000000
+                                 0 0x10000000
+                                 0x01000000 0 0x00000000
+                                 0x01000000 0 0x00000000
+                                 0 0x00800000>;
+               };
+       };
 };

diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 23c10ce..1b05fb0 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -22,6 +22,8 @@
                serial0 = &serial0;
                serial1 = &serial1;
                pci0 = &pci0;
+               pci1 = &pci1;
+               pci2 = &pci2;
        };
 
        cpus {
@@ -334,4 +336,66 @@
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };
+
+       pci1: pcie@e0009000 {
+               #address-cells = <3>;
+               #size-cells = <2>;
+               #interrupt-cells = <1>;
+               device_type = "pci";
+               compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
+               reg = <0xe0009000 0x00001000>;
+               ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
+                         0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
+               bus-range = <0 255>;
+               interrupt-map-mask = <0xf800 0 0 7>;
+               interrupt-map = <0 0 0 1 &ipic 1 8
+                                0 0 0 2 &ipic 1 8
+                                0 0 0 3 &ipic 1 8
+                                0 0 0 4 &ipic 1 8>;
+               clock-frequency = <0>;
+
+               pcie@0 {
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       reg = <0 0 0 0 0>;
+                       ranges = <0x02000000 0 0xa8000000
+                                 0x02000000 0 0xa8000000
+                                 0 0x10000000
+                                 0x01000000 0 0x00000000
+                                 0x01000000 0 0x00000000
+                                 0 0x00800000>;
+               };
+       };
+
+       pci2: pcie@e000a000 {
+               #address-cells = <3>;
+               #size-cells = <2>;
+               #interrupt-cells = <1>;
+               device_type = "pci";
+               compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
+               reg = <0xe000a000 0x00001000>;
+               ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
+                         0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
+               bus-range = <0 255>;
+               interrupt-map-mask = <0xf800 0 0 7>;
+               interrupt-map = <0 0 0 1 &ipic 2 8
+                                0 0 0 2 &ipic 2 8
+                                0 0 0 3 &ipic 2 8
+                                0 0 0 4 &ipic 2 8>;
+               clock-frequency = <0>;
+
+               pcie@0 {
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       reg = <0 0 0 0 0>;
+                       ranges = <0x02000000 0 0xc8000000
+                                 0x02000000 0 0xc8000000
+                                 0 0x10000000
+                                 0x01000000 0 0x00000000
+                                 0x01000000 0 0x00000000
+                                 0 0x00800000>;
+               };
+       };
 };

diff --git a/arch/powerpc/platforms/83xx/mpc831x_rdb.c b/arch/powerpc/platforms/83xx/mpc831x_rdb.c
index 91a2c80..0b4f883 100644 (file)
--- a/arch/powerpc/platforms/83xx/mpc831x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc831x_rdb.c
@@ -38,6 +38,8 @@ static void __init mpc831x_rdb_setup_arch(void)
 #ifdef CONFIG_PCI
        for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
                mpc83xx_add_bridge(np);
+       for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie")
+               mpc83xx_add_bridge(np);
 #endif
        mpc831x_usb_cfg();
 }

diff --git a/arch/powerpc/platforms/83xx/mpc837x_mds.c b/arch/powerpc/platforms/83xx/mpc837x_mds.c
index 530ef99..634785c 100644 (file)
--- a/arch/powerpc/platforms/83xx/mpc837x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc837x_mds.c
@@ -84,14 +84,10 @@ static void __init mpc837x_mds_setup_arch(void)
                ppc_md.progress("mpc837x_mds_setup_arch()", 0);
 
 #ifdef CONFIG_PCI
-       for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") {
-               if (!of_device_is_available(np)) {
-                       pr_warning("%s: disabled by the firmware.\n",
-                                  np->full_name);
-                       continue;
-               }
+       for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
+               mpc83xx_add_bridge(np);
+       for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie")
                mpc83xx_add_bridge(np);
-       }
 #endif
        mpc837xmds_usb_cfg();
 }

diff --git a/arch/powerpc/platforms/83xx/mpc837x_rdb.c b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
index 1d09654..3d7b953 100644 (file)
--- a/arch/powerpc/platforms/83xx/mpc837x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
@@ -38,6 +38,8 @@ static void __init mpc837x_rdb_setup_arch(void)
 #ifdef CONFIG_PCI
        for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
                mpc83xx_add_bridge(np);
+       for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie")
+               mpc83xx_add_bridge(np);
 #endif
        mpc837x_usb_cfg();
 }