sh: Fix SH-4 CPU selects.
authorPaul Mundt <lethal@linux-sh.org>
Tue, 15 May 2007 07:25:47 +0000 (16:25 +0900)
committerPaul Mundt <lethal@hera.kernel.org>
Fri, 8 Jun 2007 02:43:40 +0000 (02:43 +0000)
Now that select no longer works for selecting the "closest" CPU,
we have to explicitly reference the precise sub-type in the few
places where it actually matters (presently only setup code and
some legacy sh-sci cruft).

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
arch/sh/Kconfig
arch/sh/kernel/cpu/sh4/Makefile
arch/sh/mm/Kconfig
drivers/serial/sh-sci.h

index 6c42c8e..78f5f23 100644 (file)
@@ -467,13 +467,13 @@ config SH_PCLK_FREQ
        int "Peripheral clock frequency (in Hz)"
        default "27000000" if CPU_SUBTYPE_SH73180 || CPU_SUBTYPE_SH7343
        default "31250000" if CPU_SUBTYPE_SH7619
+       default "32000000" if CPU_SUBTYPE_SH7722
        default "33333333" if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH7770 || \
                              CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \
                              CPU_SUBTYPE_SH7206
-       default "50000000" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7780 || \
-                             CPU_SUBTYPE_SH7785
-       default "60000000" if CPU_SUBTYPE_SH7751
+       default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
        default "66000000" if CPU_SUBTYPE_SH4_202
+       default "50000000"
        help
          This option is used to specify the peripheral clock frequency.
          This is necessary for determining the reference clock value on
index 8add10b..dadd6bf 100644 (file)
@@ -10,7 +10,11 @@ obj-$(CONFIG_SH_STORE_QUEUES)                += sq.o
 
 # CPU subtype setup
 obj-$(CONFIG_CPU_SUBTYPE_SH7750)       += setup-sh7750.o
+obj-$(CONFIG_CPU_SUBTYPE_SH7750R)      += setup-sh7750.o
+obj-$(CONFIG_CPU_SUBTYPE_SH7750S)      += setup-sh7750.o
+obj-$(CONFIG_CPU_SUBTYPE_SH7091)       += setup-sh7750.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7751)       += setup-sh7750.o
+obj-$(CONFIG_CPU_SUBTYPE_SH7751R)      += setup-sh7750.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7760)       += setup-sh7760.o
 obj-$(CONFIG_CPU_SUBTYPE_SH4_202)      += setup-sh4-202.o
 
index 8f826b0..00f64c4 100644 (file)
@@ -126,7 +126,6 @@ config CPU_SUBTYPE_SH7750
 config CPU_SUBTYPE_SH7091
        bool "Support SH7091 processor"
        select CPU_SH4
-       select CPU_SUBTYPE_SH7750
        help
          Select SH7091 if you have an SH-4 based Sega device (such as
          the Dreamcast, Naomi, and Naomi 2).
@@ -134,13 +133,11 @@ config CPU_SUBTYPE_SH7091
 config CPU_SUBTYPE_SH7750R
        bool "Support SH7750R processor"
        select CPU_SH4
-       select CPU_SUBTYPE_SH7750
        select CPU_HAS_IPR_IRQ
 
 config CPU_SUBTYPE_SH7750S
        bool "Support SH7750S processor"
        select CPU_SH4
-       select CPU_SUBTYPE_SH7750
        select CPU_HAS_IPR_IRQ
 
 config CPU_SUBTYPE_SH7751
@@ -154,7 +151,6 @@ config CPU_SUBTYPE_SH7751
 config CPU_SUBTYPE_SH7751R
        bool "Support SH7751R processor"
        select CPU_SH4
-       select CPU_SUBTYPE_SH7751
        select CPU_HAS_IPR_IRQ
 
 config CPU_SUBTYPE_SH7760
index fb04fb5..da643b3 100644 (file)
 # define SCIF_ORER 0x0001   /* overrun error bit */
 # define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
 # define SCIF_ONLY
-#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751)
+#elif defined(CONFIG_CPU_SUBTYPE_SH7750)  || \
+      defined(CONFIG_CPU_SUBTYPE_SH7750R) || \
+      defined(CONFIG_CPU_SUBTYPE_SH7750S) || \
+      defined(CONFIG_CPU_SUBTYPE_SH7091)  || \
+      defined(CONFIG_CPU_SUBTYPE_SH7751)  || \
+      defined(CONFIG_CPU_SUBTYPE_SH7751R)
 # define SCSPTR1 0xffe0001c /* 8  bit SCI */
 # define SCSPTR2 0xFFE80020 /* 16 bit SCIF */
 # define SCIF_ORER 0x0001   /* overrun error bit */
 #define SCI_CTRL_FLAGS_RIE  0x40 /* all */
 #define SCI_CTRL_FLAGS_TE   0x20 /* all */
 #define SCI_CTRL_FLAGS_RE   0x10 /* all */
-#if defined(CONFIG_CPU_SUBTYPE_SH7750) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7751) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7780) || \
+#if defined(CONFIG_CPU_SUBTYPE_SH7750)  || \
+    defined(CONFIG_CPU_SUBTYPE_SH7091)  || \
+    defined(CONFIG_CPU_SUBTYPE_SH7750R) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7750S) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7751)  || \
+    defined(CONFIG_CPU_SUBTYPE_SH7751R) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7780)  || \
     defined(CONFIG_CPU_SUBTYPE_SH7785)
 #define SCI_CTRL_FLAGS_REIE 0x08 /* 7750 SCIF */
 #else
@@ -514,8 +523,12 @@ static inline void set_sh771x_scif_pfc(struct uart_port *port)
        }
 }
 
-#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || \
-      defined(CONFIG_CPU_SUBTYPE_SH7751) || \
+#elif defined(CONFIG_CPU_SUBTYPE_SH7750)  || \
+      defined(CONFIG_CPU_SUBTYPE_SH7751)  || \
+      defined(CONFIG_CPU_SUBTYPE_SH7751R) || \
+      defined(CONFIG_CPU_SUBTYPE_SH7750R) || \
+      defined(CONFIG_CPU_SUBTYPE_SH7750S) || \
+      defined(CONFIG_CPU_SUBTYPE_SH7091)  || \
       defined(CONFIG_CPU_SUBTYPE_SH4_202)
 static inline int sci_rxd_in(struct uart_port *port)
 {