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ARM: dts: sirf: add pin group for USP0 with only RX or TX frame sync for atlas6
authorRongjun Ying <rongjun.ying@csr.com>
Thu, 30 Jan 2014 05:54:53 +0000 (13:54 +0800)
committerBarry Song <Baohua.Song@csr.com>
Wed, 7 May 2014 08:01:29 +0000 (16:01 +0800)
add pin groups for USP0 only holding one of TX and RX frame sync. this patch
matches with the change in drivers/pinctrl/sirf.

commit 73f68c01f46 did this for prima2, but missed prima2. this patch fixes
the problem.

Signed-off-by: Rongjun Ying <rongjun.ying@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>

No differences found
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