This does a bit of reorganizing for allowing nommu to use the new
and generic cache.c, no functional changes.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
void *kmap_coherent(struct page *page, unsigned long addr);
void kunmap_coherent(void);
void *kmap_coherent(struct page *page, unsigned long addr);
void kunmap_coherent(void);
+#define PG_dcache_dirty PG_arch_1
+
#endif /* __KERNEL__ */
#endif /* __ASM_SH_CACHEFLUSH_H */
#endif /* __KERNEL__ */
#endif /* __ASM_SH_CACHEFLUSH_H */
extern void copy_user_page(void *to, void *from, unsigned long address,
struct page *page);
extern void copy_user_page(void *to, void *from, unsigned long address,
struct page *page);
-#elif defined(CONFIG_MMU)
extern void copy_user_highpage(struct page *to, struct page *from,
unsigned long vaddr, struct vm_area_struct *vma);
#define __HAVE_ARCH_COPY_USER_HIGHPAGE
extern void clear_user_highpage(struct page *page, unsigned long vaddr);
#define clear_user_highpage clear_user_highpage
extern void copy_user_highpage(struct page *to, struct page *from,
unsigned long vaddr, struct vm_area_struct *vma);
#define __HAVE_ARCH_COPY_USER_HIGHPAGE
extern void clear_user_highpage(struct page *page, unsigned long vaddr);
#define clear_user_highpage clear_user_highpage
-#else
-
-#define clear_user_page(page, vaddr, pg) clear_page(page)
-#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
-
* SH4. Unlike the SH4 this is a unified cache so we need to do some work
* in mmap when 'exec'ing a new binary
*/
* SH4. Unlike the SH4 this is a unified cache so we need to do some work
* in mmap when 'exec'ing a new binary
*/
-#define PG_dcache_dirty PG_arch_1
-
void flush_cache_all(void);
void flush_cache_mm(struct mm_struct *mm);
#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
void flush_cache_all(void);
void flush_cache_mm(struct mm_struct *mm);
#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
/* Initialization of P3 area for copy_user_page */
void p3_cache_init(void);
/* Initialization of P3 area for copy_user_page */
void p3_cache_init(void);
-#define PG_dcache_dirty PG_arch_1
-
#endif /* __ASM_CPU_SH4_CACHEFLUSH_H */
#endif /* __ASM_CPU_SH4_CACHEFLUSH_H */
cache_init();
if (raw_smp_processor_id() == 0) {
cache_init();
if (raw_smp_processor_id() == 0) {
shm_align_mask = max_t(unsigned long,
current_cpu_data.dcache.way_size - 1,
PAGE_SIZE - 1);
shm_align_mask = max_t(unsigned long,
current_cpu_data.dcache.way_size - 1,
PAGE_SIZE - 1);
/* Boot CPU sets the cache shape */
detect_cache_shape();
/* Boot CPU sets the cache shape */
detect_cache_shape();
#include <asm/page.h>
#include <asm/processor.h>
#include <asm/page.h>
#include <asm/processor.h>
unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */
EXPORT_SYMBOL(shm_align_mask);
unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */
EXPORT_SYMBOL(shm_align_mask);
/*
* To avoid cache aliases, we map the shared page with same color.
*/
/*
* To avoid cache aliases, we map the shared page with same color.
*/
-void __update_cache(struct vm_area_struct *vma,
- unsigned long address, pte_t pte)
-{
-}
-
void __init kmap_coherent_init(void)
{
}
void __init kmap_coherent_init(void)
{
}