This patch contains various fixes for 16-bit cmt hardware.
With this applied periodic clockevents work fine on sh7203.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
pr_err("sh_cmt: cannot enable clock \"%s\"\n", cfg->clk);
return ret;
}
pr_err("sh_cmt: cannot enable clock \"%s\"\n", cfg->clk);
return ret;
}
- *rate = clk_get_rate(p->clk) / 8;
/* make sure channel is disabled */
sh_cmt_start_stop_ch(p, 0);
/* configure channel, periodic mode and maximum timeout */
/* make sure channel is disabled */
sh_cmt_start_stop_ch(p, 0);
/* configure channel, periodic mode and maximum timeout */
- if (p->width == 16)
- sh_cmt_write(p, CMCSR, 0);
- else
+ if (p->width == 16) {
+ *rate = clk_get_rate(p->clk) / 512;
+ sh_cmt_write(p, CMCSR, 0x43);
+ } else {
+ *rate = clk_get_rate(p->clk) / 8;
sh_cmt_write(p, CMCSR, 0x01a4);
sh_cmt_write(p, CMCSR, 0x01a4);
sh_cmt_write(p, CMCOR, 0xffffffff);
sh_cmt_write(p, CMCNT, 0);
sh_cmt_write(p, CMCOR, 0xffffffff);
sh_cmt_write(p, CMCNT, 0);
if (resource_size(res) == 6) {
p->width = 16;
p->overflow_bit = 0x80;
if (resource_size(res) == 6) {
p->width = 16;
p->overflow_bit = 0x80;
} else {
p->width = 32;
p->overflow_bit = 0x8000;
} else {
p->width = 32;
p->overflow_bit = 0x8000;