ARM: OMAP: counter-32k: raw read and write endian fix
authorVictor Kamensky <victor.kamensky@linaro.org>
Tue, 15 Apr 2014 17:37:48 +0000 (20:37 +0300)
committerTony Lindgren <tony@atomide.com>
Thu, 8 May 2014 14:09:55 +0000 (07:09 -0700)
commitf6f3b50f996b938b034b14b5084108b2acfcae7d
treedc7006a6b24ba55efbc9d085141f6f1b7618b5f8
parent834cacfbef09afc5566eae4dbdc08a422e90451b
ARM: OMAP: counter-32k: raw read and write endian fix

All OMAP IP blocks expect LE data, but CPU may operate in BE mode.
Need to use endian neutral functions to read/write h/w registers.
I.e instead of __raw_read[lw] and __raw_write[lw] functions code
need to use read[lw]_relaxed and write[lw]_relaxed functions.
If the first simply reads/writes register, the second will byteswap
it if host operates in BE mode.

Changes are trivial sed like replacement of __raw_xxx functions
with xxx_relaxed variant.

Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>
Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/plat-omap/counter_32k.c