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(parent: 8ca2861) | patch
mmc: dw_mmc: add support for RK3288
authorAddy Ke <addy.ke@rock-chips.com>
Thu, 31 Jul 2014 06:01:38 +0000 (14:01 +0800)
committerUlf Hansson <ulf.hansson@linaro.org>
Tue, 9 Sep 2014 11:58:59 +0000 (13:58 +0200)
commitf629ba2c04c949aa62c85b48c0b73b915b98defc
treea96d3041262eb032c00bb329cf55f78f864301cftree | snapshot
parent8ca28610e5e37193cd61fefa4310941e28de10cacommit | diff
mmc: dw_mmc: add support for RK3288

This patch focuses on clock setting for RK3288 mmc controller.

In RK3288 mmc controller, CLKDIV register can only be set 0 or 1,
and if DDR 8bit mode, CLKDIV register must be set 1.

Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt diff | blob | history
drivers/mmc/host/dw_mmc-pltfm.c diff | blob | history
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