[PATCH] x86_64: Calgary IOMMU - Calgary specific bits
authorJon Mason <jdmason@us.ibm.com>
Mon, 26 Jun 2006 11:58:14 +0000 (13:58 +0200)
committerLinus Torvalds <torvalds@g5.osdl.org>
Mon, 26 Jun 2006 17:48:19 +0000 (10:48 -0700)
commite465058d55a88feb4c7ecabe63eea7ea7147e206
treed431ed689e072415915694eecdfbcb9304287f01
parent0dc243ae10c8309c170a3af9f1adad1924a9f217
[PATCH] x86_64: Calgary IOMMU - Calgary specific bits

This patch hooks Calgary into the build, the x86-64 IOMMU
initialization paths, and introduces the Calgary specific bits.  The
implementation draws inspiration from both PPC (which has support for
the same chip but requires firmware support which we don't have on
x86-64) and gart. Calgary is different from gart in that it support a
translation table per PHB, as opposed to the single gart aperture.

Changes from previous version:
 * Addition of boot-time disablement for bus-level translation/isolation
   (e.g, enable userspace DMA for things like X)
 * Usage of newer IOMMU abstraction functions

Signed-off-by: Muli Ben-Yehuda <muli@il.ibm.com>
Signed-off-by: Jon Mason <jdmason@us.ibm.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Documentation/x86_64/boot-options.txt
arch/x86_64/Kconfig
arch/x86_64/kernel/Makefile
arch/x86_64/kernel/pci-calgary.c [new file with mode: 0644]
arch/x86_64/kernel/pci-dma.c
arch/x86_64/kernel/tce.c [new file with mode: 0644]
include/asm-x86_64/calgary.h [new file with mode: 0644]
include/asm-x86_64/pci.h
include/asm-x86_64/tce.h [new file with mode: 0644]