x86/cpu/AMD: Make LFENCE a serializing instruction
authorTom Lendacky <thomas.lendacky@amd.com>
Mon, 8 Jan 2018 22:09:21 +0000 (16:09 -0600)
committerBen Hutchings <ben@decadent.org.uk>
Mon, 19 Mar 2018 18:58:30 +0000 (18:58 +0000)
commitdd02d5819b11f85cf3e862e6b6c10a88eae0fa2a
treebd0b3126464f9bffda4f9d6e7b3ef130f103d1a5
parent7616ebebbb0dfb0b4ae8df02de2d45050cb33138
x86/cpu/AMD: Make LFENCE a serializing instruction

commit e4d0e84e490790798691aaa0f2e598637f1867ec upstream.

To aid in speculation control, make LFENCE a serializing instruction
since it has less overhead than MFENCE.  This is done by setting bit 1
of MSR 0xc0011029 (DE_CFG).  Some families that support LFENCE do not
have this MSR.  For these families, the LFENCE instruction is already
serializing.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Reviewed-by: Borislav Petkov <bp@suse.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Tim Chen <tim.c.chen@linux.intel.com>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Greg Kroah-Hartman <gregkh@linux-foundation.org>
Cc: David Woodhouse <dwmw@amazon.co.uk>
Cc: Paul Turner <pjt@google.com>
Link: https://lkml.kernel.org/r/20180108220921.12580.71694.stgit@tlendack-t1.amdoffice.net
[bwh: Backported to 3.2: adjust context]
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
arch/x86/include/asm/msr-index.h
arch/x86/kernel/cpu/amd.c