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(parent: 6ee7bb5) | patch
board: ge: bx50v3: correct LDB clock
authorIan Ray <ian.ray@ge.com>
Mon, 15 Oct 2018 07:59:44 +0000 (09:59 +0200)
committerStefano Babic <sbabic@denx.de>
Mon, 22 Oct 2018 12:32:07 +0000 (14:32 +0200)
commitd9ea0d77a8ff2d0522313aa1bb65ee955e252c93
tree5794ea461b0c07477a6409dbb8d259627808b87etree | snapshot
parent6ee7bb528eacbba9629e44b8123becb9076b9308commit | diff
board: ge: bx50v3: correct LDB clock

Use Video PLL to provide 65MHz for all displays.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
board/ge/bx50v3/bx50v3.c diff | blob | history
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