dmaengine: dw: enable clock before access
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Thu, 8 May 2014 09:01:48 +0000 (12:01 +0300)
committerVinod Koul <vinod.koul@intel.com>
Thu, 22 May 2014 10:07:24 +0000 (15:37 +0530)
commitd2f78e95e42a9130002c76f1a1f76e657a4b4004
treeba270d4a8ca0666bd753f3bad9088a113730452a
parentfbeb91fe8e4107dc88df4eaa21de02c3fd9d1cd5
dmaengine: dw: enable clock before access

hclk signal is a bus clock. So, it means we have to have it enabled during
access to the DMA controller. This patch makes sure that we enable clock before
access to the device, though it currently works on Intel hardware.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
drivers/dma/dw/core.c